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Results 1 - 10 of 185 for Xmul (0.14 sec)
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test/codegen/floats.go
// arm/7:"ADDD",-"MULD" // arm64:"FADDD",-"FMULD" // ppc64x:"FADD",-"FMUL" // riscv64:"FADDD",-"FMULD" return f * 2.0 } func DivPow2(f1, f2, f3 float64) (float64, float64, float64) { // 386/sse2:"MULSD",-"DIVSD" // amd64:"MULSD",-"DIVSD" // arm/7:"MULD",-"DIVD" // arm64:"FMULD",-"FDIVD" // ppc64x:"FMUL",-"FDIV" // riscv64:"FMULD",-"FDIVD" x := f1 / 16.0 // 386/sse2:"MULSD",-"DIVSD"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Apr 04 15:24:29 UTC 2024 - 4.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/legalize-tfl-stablehlo-mul.mlir
Eugene Burmako <******@****.***> 1671166704 -0800
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Dec 16 05:09:09 UTC 2022 - 751 bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64.rules
(Sub(32|64)F ...) => (SUBS(S|D) ...) (Mul(64|32|16|8) ...) => (MUL(Q|L|L|L) ...) (Mul(32|64)F ...) => (MULS(S|D) ...) (Select0 (Mul64uover x y)) => (Select0 <typ.UInt64> (MULQU x y)) (Select0 (Mul32uover x y)) => (Select0 <typ.UInt32> (MULLU x y)) (Select1 (Mul(64|32)uover x y)) => (SETO (Select1 <types.TypeFlags> (MUL(Q|L)U x y))) (Hmul(64|32) ...) => (HMUL(Q|L) ...) (Hmul(64|32)u ...) => (HMUL(Q|L)U ...)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 93.9K bytes - Viewed (0) -
src/cmd/asm/internal/arch/loong64.go
return true } return false } // IsLoong64MUL reports whether the op (as defined by an loong64.A* constant) is // one of the MUL/DIV/REM instructions that require special handling. func IsLoong64MUL(op obj.As) bool { switch op { case loong64.AMUL, loong64.AMULU, loong64.AMULV, loong64.AMULVU, loong64.ADIV, loong64.ADIVU, loong64.ADIVV, loong64.ADIVVU, loong64.AREM, loong64.AREMU, loong64.AREMV, loong64.AREMVU:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 2.1K bytes - Viewed (0) -
src/cmd/compile/internal/test/fixedbugs_test.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Feb 06 18:07:35 UTC 2023 - 2.1K bytes - Viewed (0) -
src/math/sin_s390x.s
FMADD F1, F6, F4 FMOVD 0(R2), F1 FMADD F3, F2, F1 FMUL F0, F2 WFMADB V6, V4, V1, V6 TMLL R1, $2 FMADD F6, F2, F0 BNE L34 FMOVD F0, ret+8(FP) RET L33: MOVD $sincosxnan<>+0(SB), R1 FMOVD 0(R1), F0 FMOVD F0, ret+8(FP) RET L36: FMUL F0, F0 MOVD $sincosc0<>+0(SB), R1 WFMDB V0, V0, V1 WFMADB V0, V4, V20, V4
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 31 04:25:54 UTC 2023 - 8.6K bytes - Viewed (0) -
src/net/interface_windows.go
index := aa.IfIndex if index == 0 { // ipv6IfIndex is a substitute for ifIndex index = aa.Ipv6IfIndex } if ifi == nil || ifi.Index == int(index) { for pmul := aa.FirstMulticastAddress; pmul != nil; pmul = pmul.Next { sa, err := pmul.Address.Sockaddr.Sockaddr() if err != nil { return nil, os.NewSyscallError("sockaddr", err) } switch sa := sa.(type) { case *syscall.SockaddrInet4:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 15 10:25:02 UTC 2024 - 5.5K bytes - Viewed (0) -
src/crypto/elliptic/params.go
} i := new(big.Int).Lsh(h, 1) i.Mul(i, i) j := new(big.Int).Mul(h, i) s1 := new(big.Int).Mul(y1, z2) s1.Mul(s1, z2z2) s1.Mod(s1, curve.P) s2 := new(big.Int).Mul(y2, z1) s2.Mul(s2, z1z1) s2.Mod(s2, curve.P) r := new(big.Int).Sub(s2, s1) if r.Sign() == -1 { r.Add(r, curve.P) } yEqual := r.Sign() == 0 if xEqual && yEqual { return curve.doubleJacobian(x1, y1, z1) }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 17:46:09 UTC 2024 - 9.6K bytes - Viewed (0) -
src/math/tan_s390x.s
FMOVD 0(R1), F4 WFMSDB V0, V6, V4, V6 FMOVD 80(R5), F1 FADD F6, F4 FMOVD 72(R5), F2 FMSUB F1, F4, F0 FMOVD 64(R5), F3 WFMADB V4, V2, V0, V2 FMOVD 56(R5), F1 WFMADB V4, V3, V2, V4 FMUL F2, F2 VLEG $0, 48(R5), V18 LGDR F6, R1 FMOVD 40(R5), F5 FMOVD 32(R5), F3 FMADD F1, F2, F3 FMOVD 24(R5), F1 FMOVD 16(R5), F7 FMOVD 8(R5), F0 WFMADB V2, V7, V1, V7 WFMADB V2, V0, V5, V0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Jul 27 23:30:00 UTC 2023 - 2.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/RISCV64.rules
(Select0 m:(LoweredMuluhilo x y)) && m.Uses == 1 => (MULHU x y) (Select1 m:(LoweredMuluhilo x y)) && m.Uses == 1 => (MUL x y) (FADD(S|D) a (FMUL(S|D) x y)) && a.Block.Func.useFMA(v) => (FMADD(S|D) x y a) (FSUB(S|D) a (FMUL(S|D) x y)) && a.Block.Func.useFMA(v) => (FNMSUB(S|D) x y a) (FSUB(S|D) (FMUL(S|D) x y) a) && a.Block.Func.useFMA(v) => (FMSUB(S|D) x y a) // Merge negation into fused multiply-add and multiply-subtract. //
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 40.3K bytes - Viewed (0)