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Results 1 - 10 of 33 for FADD (0.03 sec)

  1. src/math/tanh_s390x.s

    	WORD    $0xED005010     //adb %f0,.L28-.L18(%r5)
    	BYTE    $0x00
    	BYTE    $0x1A
    	WORD    $0xA7184330     //lhi %r1,17200
    	FADD    F2, F0
    	MOVW    R2, R10
    	MOVW    R1, R11
    	CMPBGT  R10, R11, L17
    	WORD    $0xED605010     //sdb %f6,.L28-.L18(%r5)
    	BYTE    $0x00
    	BYTE    $0x1B
    	FADD    F6, F2
    	WFDDB   V0, V2, V0
    	FMOVD   F0, ret+8(FP)
    	RET
    
    L9:
    	FMOVD   tanhrodataL18<>+16(SB), F0
    L1:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 16 15:34:41 UTC 2019
    - 4.6K bytes
    - Viewed (0)
  2. src/math/cosh_s390x.s

    	FMOVD   0(R1), F2
    	WFCHEDBS        V4, V2, V2
    	BEQ     L21
    	MOVD    $coshxaddhy<>+0(SB), R1
    	FMOVD   coshrodataL23<>+16(SB), F5
    	FMOVD   0(R1), F2
    	WFMSDB  V0, V5, V2, V5
    	FMOVD   coshrodataL23<>+8(SB), F3
    	FADD    F5, F2
    	MOVD    $coshe6<>+0(SB), R1
    	WFMSDB  V2, V3, V0, V3
    	FMOVD   0(R1), F6
    	WFMDB   V3, V3, V1
    	MOVD    $coshe4<>+0(SB), R1
    	FMOVD   coshrodataL23<>+0(SB), F7
    	WFMADB  V2, V7, V3, V2
    	FMOVD   0(R1), F3
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 16 15:34:41 UTC 2019
    - 5.6K bytes
    - Viewed (0)
  3. test/codegen/floats.go

    //    Strength-reduce    //
    // --------------------- //
    
    func Mul2(f float64) float64 {
    	// 386/sse2:"ADDSD",-"MULSD"
    	// amd64:"ADDSD",-"MULSD"
    	// arm/7:"ADDD",-"MULD"
    	// arm64:"FADDD",-"FMULD"
    	// ppc64x:"FADD",-"FMUL"
    	// riscv64:"FADDD",-"FMULD"
    	return f * 2.0
    }
    
    func DivPow2(f1, f2, f3 float64) (float64, float64, float64) {
    	// 386/sse2:"MULSD",-"DIVSD"
    	// amd64:"MULSD",-"DIVSD"
    	// arm/7:"MULD",-"DIVD"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Apr 04 15:24:29 UTC 2024
    - 4.9K bytes
    - Viewed (0)
  4. src/math/exp_s390x.s

    	BYTE	$0x00
    	BYTE	$0x19
    	BGE	L16
    	BVS	L16
    	WFCEDBS	V2, V2, V2
    	BVS	LEXITTAGexp
    	MOVD	$·expxaddexp<>+0(SB), R1
    	FMOVD	72(R5), F6
    	FMOVD	0(R1), F2
    	WFMSDB	V0, V6, V2, V6
    	FMOVD	64(R5), F4
    	FADD	F6, F2
    	FMOVD	56(R5), F1
    	FMADD	F4, F2, F0
    	FMOVD	48(R5), F3
    	WFMADB	V2, V1, V0, V2
    	FMOVD	40(R5), F1
    	FMOVD	32(R5), F4
    	FMUL	F0, F0
    	WFMADB	V2, V4, V1, V4
    	LGDR	F6, R1
    	FMOVD	24(R5), F1
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 16 15:34:41 UTC 2019
    - 4.6K bytes
    - Viewed (0)
  5. src/math/tan_s390x.s

    	FMOVD	F0, F2
    L2:
    	MOVD	$·tanxlim<>+0(SB), R1
    	FMOVD	0(R1), F1
    	FCMPU	F2, F1
    	BGT	L9
    	BVS	L11
    	MOVD	$·tanxadd<>+0(SB), R1
    	FMOVD	88(R5), F6
    	FMOVD	0(R1), F4
    	WFMSDB	V0, V6, V4, V6
    	FMOVD	80(R5), F1
    	FADD	F6, F4
    	FMOVD	72(R5), F2
    	FMSUB	F1, F4, F0
    	FMOVD	64(R5), F3
    	WFMADB	V4, V2, V0, V2
    	FMOVD	56(R5), F1
    	WFMADB	V4, V3, V2, V4
    	FMUL	F2, F2
    	VLEG	$0, 48(R5), V18
    	LGDR	F6, R1
    	FMOVD	40(R5), F5
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Jul 27 23:30:00 UTC 2023
    - 2.7K bytes
    - Viewed (0)
  6. src/math/sin_s390x.s

    	FMOVD   0(R1), F2
    	WFCHDBS V2, V5, V2
    	BEQ     L18
    	MOVD    $sincosrpi2<>+0(SB), R1
    	FMOVD   0(R1), F3
    	MOVD    $sincosxadd<>+0(SB), R1
    	FMOVD   0(R1), F2
    	WFMSDB  V0, V3, V2, V3
    	FMOVD   0(R1), F6
    	FADD    F3, F6
    	MOVD    $sincosxpi2h<>+0(SB), R1
    	FMOVD   0(R1), F2
    	FMSUB   F2, F6, F0
    	MOVD    $sincosxpi2m<>+0(SB), R1
    	FMOVD   0(R1), F4
    	FMADD   F4, F6, F0
    	MOVD    $sincosxpi2l<>+0(SB), R1
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Jul 31 04:25:54 UTC 2023
    - 8.6K bytes
    - Viewed (0)
  7. src/cmd/internal/obj/ppc64/anames.go

    	"DIVWV",
    	"DIVWU",
    	"DIVWUCC",
    	"DIVWUVCC",
    	"DIVWUV",
    	"MODUD",
    	"MODUW",
    	"MODSD",
    	"MODSW",
    	"EQV",
    	"EQVCC",
    	"EXTSB",
    	"EXTSBCC",
    	"EXTSH",
    	"EXTSHCC",
    	"FABS",
    	"FABSCC",
    	"FADD",
    	"FADDCC",
    	"FADDS",
    	"FADDSCC",
    	"FCMPO",
    	"FCMPU",
    	"FCTIW",
    	"FCTIWCC",
    	"FCTIWZ",
    	"FCTIWZCC",
    	"FDIV",
    	"FDIVCC",
    	"FDIVS",
    	"FDIVSCC",
    	"FMADD",
    	"FMADDCC",
    	"FMADDS",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 01 18:50:29 UTC 2024
    - 6.7K bytes
    - Viewed (0)
  8. src/cmd/internal/obj/s390x/anames.go

    	"RLLG",
    	"RNSBG",
    	"RXSBG",
    	"ROSBG",
    	"RNSBGT",
    	"RXSBGT",
    	"ROSBGT",
    	"RISBG",
    	"RISBGN",
    	"RISBGZ",
    	"RISBGNZ",
    	"RISBHG",
    	"RISBLG",
    	"RISBHGZ",
    	"RISBLGZ",
    	"FABS",
    	"FADD",
    	"FADDS",
    	"FCMPO",
    	"FCMPU",
    	"CEBR",
    	"FDIV",
    	"FDIVS",
    	"FMADD",
    	"FMADDS",
    	"FMOVD",
    	"FMOVS",
    	"FMSUB",
    	"FMSUBS",
    	"FMUL",
    	"FMULS",
    	"FNABS",
    	"FNEG",
    	"FNEGS",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Sep 05 16:41:03 UTC 2023
    - 7.1K bytes
    - Viewed (0)
  9. src/math/sinh_s390x.s

    	FMOVD   F0, ret+8(FP)
    	RET
    
    L20:
    	MOVD    $sinhxadd<>+0(SB), R2
    	FMOVD   0(R2), F2
    	MOVD    sinhrlog2<>+0(SB), R2
    	LDGR    R2, F0
    	WFMSDB  V4, V0, V2, V6
    	FMOVD   sinhrodataL21<>+8(SB), F0
    	FADD    F6, F2
    	MOVD    $sinhe9<>+0(SB), R2
    	FMSUB   F0, F2, F4
    	FMOVD   0(R2), F1
    	FMOVD   sinhrodataL21<>+0(SB), F3
    	MOVD    $sinhe7<>+0(SB), R2
    	FMADD   F3, F2, F4
    	FMOVD   0(R2), F0
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 17 13:54:10 UTC 2021
    - 6K bytes
    - Viewed (0)
  10. src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/plan9.go

    		return true
    	case DIVD, DIVDCC, DIVDU, DIVDUCC, DIVDE, DIVDECC, DIVDEU, DIVDEUCC, DIVDO, DIVDOCC, DIVDUO, DIVDUOCC:
    		return true
    	case MODUD, MODSD, MODUW, MODSW:
    		return true
    	case FADD, FADDS, FSUB, FSUBS, FMUL, FMULS, FDIV, FDIVS, FMADD, FMADDS, FMSUB, FMSUBS, FNMADD, FNMADDS, FNMSUB, FNMSUBS, FMULSCC:
    		return true
    	case FADDCC, FADDSCC, FSUBCC, FMULCC, FDIVCC, FDIVSCC:
    		return true
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 22 17:16:14 UTC 2022
    - 10.9K bytes
    - Viewed (0)
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