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Results 1 - 6 of 6 for ubfx9 (0.06 sec)
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src/cmd/compile/internal/ssa/_gen/ARM64.rules
=> (UBFX [armBFAuxInt(sc, arm64BFWidth(ac, sc))] x) // merge ANDconst and ubfx into ubfx (ANDconst [c] (UBFX [bfc] x)) && isARM64BFMask(0, c, 0) => (UBFX [armBFAuxInt(bfc.getARM64BFlsb(), min(bfc.getARM64BFwidth(), arm64BFWidth(c, 0)))] x) (UBFX [bfc] (ANDconst [c] x)) && isARM64BFMask(0, c, 0) && bfc.getARM64BFlsb() + bfc.getARM64BFwidth() <= arm64BFWidth(c, 0) => (UBFX [bfc] x) // merge ubfx and zerso-extension into ubfx
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 113.1K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/doc.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Aug 07 00:21:42 UTC 2023 - 9.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM64.go
break } v.reset(OpARM64UBFX) v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(sc, arm64BFWidth(ac, 0))) v.AddArg(x) return true } // match: (ANDconst [c] (UBFX [bfc] x)) // cond: isARM64BFMask(0, c, 0) // result: (UBFX [armBFAuxInt(bfc.getARM64BFlsb(), min(bfc.getARM64BFwidth(), arm64BFWidth(c, 0)))] x) for { c := auxIntToInt64(v.AuxInt) if v_0.Op != OpARM64UBFX { break }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 608.6K bytes - Viewed (0) -
test/codegen/mathbits.go
// 386:"BSWAPL" // s390x:"MOVWBR" // arm64:"REVW" // ppc64x/power10: "BRW" return bits.ReverseBytes32(n) } func ReverseBytes16(n uint16) uint16 { // amd64:"ROLW" // arm64:"REV16W",-"UBFX",-"ORR" // arm/5:"SLL","SRL","ORR" // arm/6:"REV16" // arm/7:"REV16" // ppc64x/power10: "BRH" return bits.ReverseBytes16(n) } // --------------------- // // bits.RotateLeft //
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 18:51:17 UTC 2024 - 19.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM.rules
(RotateLeft32 x y) => (SRR x (RSBconst [0] <y.Type> y)) // ((x>>8) | (x<<8)) -> (REV16 x), the type of x is uint16, "|" can also be "^" or "+". // UBFX instruction is supported by ARMv6T2, ARMv7 and above versions, REV16 is supported by // ARMv6 and above versions. So for ARMv6, we need to match SLLconst, SRLconst and ORshiftLL.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 90.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
}, outputs: []outputInfo{ {0, 670826495}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 R30 }, }, }, { name: "UBFX", auxType: auxARM64BitField, argLen: 1, asm: arm64.AUBFX, reg: regInfo{ inputs: []inputInfo{
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)