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Results 1 - 10 of 10 for MOVB (0.04 sec)

  1. src/cmd/asm/internal/asm/testdata/loong64enc3.s

    	MOVWU	R4, result+4097(FP)  		// 3e000014de8f1000c4278029
    	MOVV	R4, result+65540(FP)		// 1e020014de8f1000c433c029
    	MOVV	R4, result+4097(FP)   		// 3e000014de8f1000c427c029
    	MOVB	R4, result+65540(FP)		// 1e020014de8f1000c4330029
    	MOVB	R4, result+4097(FP)   		// 3e000014de8f1000c4270029
    	MOVBU	R4, result+65540(FP)		// 1e020014de8f1000c4330029
    	MOVBU	R4, result+4097(FP)		// 3e000014de8f1000c4270029
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Thu Feb 20 14:31:35 UTC 2025
    - 10.4K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/s390x.s

    	MOVH	$-512, R3             // a739fe00
    	MOVB	$-1, R4               // a749ffff
    
    	MOVD	$32767, n-8(SP)       // e548f0107fff
    	MOVD	$-1, -524288(R1)      // e3a010008071e548a000ffff
    	MOVW	$32767, n-8(SP)       // e54cf0107fff
    	MOVW	$-32768, 4096(R2)     // e3a020000171e54ca0008000
    	MOVH	$512, n-8(SP)         // e544f0100200
    	MOVH	$-512, 524288(R3)     // c0a10008000041aa3000e544a000fe00
    	MOVB	$-1, n-8(SP)          // 92fff010
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed Jul 30 19:29:15 UTC 2025
    - 22.9K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/ppc64.s

    	MOVHZ (R3)(R4), R5              // 7ca41a2e
    	MOVHZ (R3)(R0), R5              // 7ca01a2e
    	MOVHZ (R3), R5                  // a0a30000
    	MOVB 1(R3), R4                  // 888300017c840774
    	MOVB (R3)(R4), R5               // 7ca418ae7ca50774
    	MOVB (R3)(R0), R5               // 7ca018ae7ca50774
    	MOVB (R3), R5                   // 88a300007ca50774
    	MOVBZ 1(R3), R4                 // 88830001
    	MOVBZ (R3)(R4), R5              // 7ca418ae
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Thu Nov 21 18:27:17 UTC 2024
    - 51.7K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/testdata/arm64.s

    	MOVD R3, 4095(R17)                         // 3bfe3f91630300f9
    
    // large aligned offset, use two instructions(add+ldr/str).
    	MOVB	R1, 0x1001(R2) 		// MOVB		R1, 4097(R2)		// 5b04409161070039
    	MOVB	R1, 0xffffff(R2)	// MOVB		R1, 16777215(R2)	// 5bfc7f9161ff3f39
    	MOVH	R1, 0x2002(R2)		// MOVH		R1, 8194(R2)		// 5b08409161070079
    	MOVH	R1, 0x1000ffe(R2)	// MOVH		R1, 16781310(R2)	// 5bfc7f9161ff3f79
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed Mar 26 10:48:50 UTC 2025
    - 95.3K bytes
    - Viewed (0)
  5. src/cmd/asm/internal/asm/testdata/loong64enc2.s

    	MOVWU	R4, name(SB)		// 1e00001ac4038029
    	MOVV	R4, name(SB)		// 1e00001ac403c029
    	MOVB	R4, name(SB)		// 1e00001ac4030029
    	MOVBU	R4, name(SB)		// 1e00001ac4030029
    	MOVF	F4, name(SB)		// 1e00001ac403402b
    	MOVD	F4, name(SB)		// 1e00001ac403c02b
    	MOVW	name(SB), R4		// 1e00001ac4038028
    	MOVWU	name(SB), R4		// 1e00001ac403802a
    	MOVV	name(SB), R4		// 1e00001ac403c028
    	MOVB	name(SB), R4		// 1e00001ac4030028
    	MOVBU	name(SB), R4		// 1e00001ac403002a
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Sat Mar 01 01:10:24 UTC 2025
    - 5.6K bytes
    - Viewed (0)
  6. src/cmd/asm/internal/asm/testdata/loong64enc1.s

    	MOVD	F4, F5			// 85981401
    	MOVW	R4, result+16(FP)	// 64608029
    	MOVWU	R4, result+16(FP)	// 64608029
    	MOVV	R4, result+16(FP)	// 6460c029
    	MOVB	R4, result+16(FP)	// 64600029
    	MOVBU	R4, result+16(FP)	// 64600029
    	MOVW	R4, 1(R5)		// a4048029
    	MOVWU	R4, 1(R5)		// a4048029
    	MOVV	R4, 1(R5)		// a404c029
    	MOVB	R4, 1(R5)		// a4040029
    	MOVBU	R4, 1(R5)		// a4040029
    	SC	R4, 1(R5)		// a4040021
    	SCV	R4, 1(R5)		// a4040023
    	MOVW	y+8(FP), R4		// 64408028
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Thu Sep 04 19:24:25 UTC 2025
    - 35.5K bytes
    - Viewed (0)
  7. src/cmd/asm/internal/asm/testdata/riscv64.s

    	MOV	(X5), X6				// 03b30200
    	MOV	4(X5), X6				// 03b34200
    	MOVB	(X5), X6				// 03830200
    	MOVB	4(X5), X6				// 03834200
    	MOVH	(X5), X6				// 03930200
    	MOVH	4(X5), X6				// 03934200
    	MOVW	(X5), X6				// 03a30200
    	MOVW	4(X5), X6				// 03a34200
    	MOV	X5, (X6)				// 23305300
    	MOV	X5, 4(X6)				// 23325300
    	MOVB	X5, (X6)				// 23005300
    	MOVB	X5, 4(X6)				// 23025300
    	MOVH	X5, (X6)				// 23105300
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed May 21 14:19:19 UTC 2025
    - 49.1K bytes
    - Viewed (0)
  8. src/cmd/asm/internal/asm/testdata/riscv64error.s

    // license that can be found in the LICENSE file.
    
    TEXT errors(SB),$0
    	MOV	$errors(SB), (X5)		// ERROR "address load must target register"
    	MOV	$8(SP), (X5)			// ERROR "address load must target register"
    	MOVB	$8(SP), X5			// ERROR "unsupported address load"
    	MOVH	$8(SP), X5			// ERROR "unsupported address load"
    	MOVW	$8(SP), X5			// ERROR "unsupported address load"
    	MOVF	$8(SP), X5			// ERROR "unsupported address load"
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Thu May 08 08:53:43 UTC 2025
    - 24.8K bytes
    - Viewed (0)
  9. src/cmd/asm/internal/asm/testdata/arm64error.s

    	MOVWU	(R5)(R4.UXTW<<3), R10                            // ERROR "invalid index shift amount"
    	MOVWU	(R5)(R4<<1), R10                                 // ERROR "invalid index shift amount"
    	MOVB	(R5)(R4.SXTW<<5), R10                            // ERROR "invalid index shift amount"
    	MOVH	R5, (R6)(R2<<3)                                  // ERROR "invalid index shift amount"
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed Mar 26 10:48:50 UTC 2025
    - 37.9K bytes
    - Viewed (0)
  10. lib/fips140/v1.0.0.zip

    slices PCALIGN $16 loop16b: MOVOU (SI)(AX*1), X0 // XOR 16byte forwards. MOVOU (CX)(AX*1), X1 PXOR X1, X0 MOVOU X0, (BX)(AX*1) ADDQ $16, AX CMPQ DX, AX JNE loop16b RET PCALIGN $16 loop_1b: SUBQ $1, DX // XOR 1byte backwards. MOVB (SI)(DX*1), DI MOVB (CX)(DX*1), AX XORB AX, DI MOVB DI, (BX)(DX*1) TESTQ $7, DX // AND 7 & len, if not zero jump to loop_1b. JNZ loop_1b CMPQ DX, $0 // if len is 0, ret. JE ret TESTQ $15, DX // AND 15 & len, if zero jump to aligned. JZ aligned not_aligned: TESTQ $7, DX // AND...
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed Jan 29 15:10:35 UTC 2025
    - 635K bytes
    - Viewed (0)
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