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src/cmd/asm/internal/asm/testdata/riscv64error.s
SD X5, 4294967296(X6) // ERROR "constant 4294967296 too large" SRLI $1, X5, F1 // ERROR "expected integer register in rd position but got non-integer register F1" SRLI $1, F1, X5 // ERROR "expected integer register in rs1 position but got non-integer register F1" FNES F1, (X5) // ERROR "needs an integer register output"
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Sun Apr 07 03:32:27 GMT 2024 - 2.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/mips64.s
// LBRA rreg ',' sreg ',' rel // { // outcode(int($1), &$2, 0, &$4); // } label2: BEQ R1, R2, 1(PC) // BEQ R1, R2, 1(PC) // 10220001 BEQ R1, R2, label2 // BEQ R1, R2, 20 // 1022fffd // // other integer conditional branch // // LBRA rreg ',' rel // { // outcode(int($1), &$2, 0, &$4); // } label3: BLTZ R1, 1(PC) // BLTZ R1, 1(PC) // 04200001 BLTZ R1, label3 // BLTZ R1, 22 // 0420fffd //
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Tue Aug 08 12:17:12 GMT 2023 - 12.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/mips.s
// } MOVW R1, M1 MOVW R1, M1 // LMOVW mreg ',' rreg // { // outcode(int($1), &$2, 0, &$4); // } MOVW M1, R1 MOVW M1, R1 // // integer operations // logical instructions // shift instructions // unary instructions // // LADDW rreg ',' sreg ',' rreg // { // outcode(int($1), &$2, int($4), &$6); // } ADD R1, R2, R3
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Tue Aug 08 12:17:12 GMT 2023 - 6.7K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/riscv64.s
// license that can be found in the LICENSE file. #include "../../../../../runtime/textflag.h" TEXT asmtest(SB),DUPOK|NOSPLIT,$0 start: // Unprivileged ISA // 2.4: Integer Computational Instructions ADDI $2047, X5 // 9382f27f ADDI $-2048, X5 // 93820280 ADDI $2048, X5 // 9382024093820240 ADDI $-2049, X5 // 938202c09382f2bf ADDI $4094, X5 // 9382f27f9382f27f
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Fri Mar 22 04:42:21 GMT 2024 - 16.7K bytes - Viewed (1)