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Results 1 - 4 of 4 for SRA (0.09 sec)
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src/cmd/compile/internal/ssa/_gen/ARM64.rules
// signed right shift (Rsh64x(64|32|16|8) <t> x y) && shiftIsBounded(v) => (SRA <t> x y) (Rsh32x(64|32|16|8) <t> x y) && shiftIsBounded(v) => (SRA <t> (SignExt32to64 x) y) (Rsh16x(64|32|16|8) <t> x y) && shiftIsBounded(v) => (SRA <t> (SignExt16to64 x) y) (Rsh8x(64|32|16|8) <t> x y) && shiftIsBounded(v) => (SRA <t> (SignExt8to64 x) y) // unsigned right shift
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 113.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteRISCV64.go
v.reset(OpRISCV64SNEZ) v.AddArg(x) return true } return false } func rewriteValueRISCV64_OpRISCV64SRA(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] // match: (SRA x (MOVDconst [val])) // result: (SRAI [int64(val&63)] x) for { x := v_0 if v_1.Op != OpRISCV64MOVDconst { break } val := auxIntToInt64(v_1.AuxInt) v.reset(OpRISCV64SRAI)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 205.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteMIPS.go
v.AuxInt = int32ToAuxInt(d << uint32(c)) return true } return false } func rewriteValueMIPS_OpMIPSSRA(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] // match: (SRA x (MOVWconst [c])) // result: (SRAconst x [c&31]) for { x := v_0 if v_1.Op != OpMIPSMOVWconst { break } c := auxIntToInt32(v_1.AuxInt) v.reset(OpMIPSSRAconst)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 14:43:03 UTC 2023 - 176.6K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/asm9.go
case 53: /* mffsX ,fr1 */ o1 = AOP_RRR(OP_MFFS, uint32(p.To.Reg), 0, 0) case 55: /* op Rb, Rd */ o1 = AOP_RRR(c.oprrr(p.As), uint32(p.To.Reg), 0, uint32(p.From.Reg)) case 56: /* sra $sh,[s,]a; srd $sh,[s,]a */ v := c.regoff(&p.From) r := int(p.Reg) if r == 0 { r = int(p.To.Reg) } o1 = AOP_RRR(c.opirr(p.As), uint32(r), uint32(p.To.Reg), uint32(v)&31)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 13:55:28 UTC 2024 - 156.1K bytes - Viewed (0)