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Results 1 - 5 of 5 for SRAW (0.06 sec)

  2. github.com/golang/go

    src/cmd/compile/internal/ssa/_gen/RISCV64.rules 

    (Rsh32x8  <t> x y) && !shiftIsBounded(v) => (SRAW <t> x                 (OR <y.Type> y (ADDI <y.Type> [-1] (SLTIU <y.Type> [32] (ZeroExt8to64  y)))))
(Rsh32x16 <t> x y) && !shiftIsBounded(v) => (SRAW <t> x                 (OR <y.Type> y (ADDI <y.Type> [-1] (SLTIU <y.Type> [32] (ZeroExt16to64 y)))))
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 07 14:57:07 UTC 2024
    - 40.3K bytes
    - Viewed (0)
  3. github.com/golang/go

    test/codegen/shift.go 

    	return v >> (s & 31)
}

func rshMask32x64(v int32, s uint64) int32 {
	// arm64:"ASR",-"AND"
	// ppc64x:"ISEL",-"ORN"
	// riscv64:"SRAW","OR","SLTIU"
	// s390x:-"RISBGZ",-"AND",-"LOCGR"
	return v >> (s & 63)
}

func rsh5Mask32x64(v int32, s uint64) int32 {
	// riscv64:"SRAW",-"OR",-"SLTIU"
	return v >> (s & 31)
}

func lshMask64x32(v int64, s uint32) int64 {
	// arm64:"LSL",-"AND"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue May 21 18:53:43 UTC 2024
    - 12.7K bytes
    - Viewed (0)
  4. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/riscv64.s 

    	SRLW	X5, X6, X7				// bb535300
	SUBW	X5, X6, X7				// bb035340
	SRAW	X5, X6, X7				// bb535340
	ADDIW	$1, X6					// 1b031300
	SLLIW	$1, X6					// 1b131300
	SRLIW	$1, X6					// 1b531300
	SRAIW	$1, X6					// 1b531340
	ADDW	X5, X7					// bb835300
	SLLW	X5, X7					// bb935300
	SRLW	X5, X7					// bbd35300
	SUBW	X5, X7					// bb835340
	SRAW	X5, X7					// bbd35340
	ADDW	$1, X6					// 1b031300
	SLLW	$1, X6					// 1b131300
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Mar 22 04:42:21 UTC 2024
    - 16.7K bytes
    - Viewed (0)
  5. github.com/golang/go

    src/cmd/compile/internal/ssa/_gen/RISCV64Ops.go 

    		{name: "SRA", argLength: 2, reg: gp21, asm: "SRA"},                   // arg0 >> (aux1 & 63), arithmetic right shift
		{name: "SRAW", argLength: 2, reg: gp21, asm: "SRAW"},                 // arg0 >> (aux1 & 31), arithmetic right shift of 32 bit value, sign extended to 64 bits
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 07 14:57:07 UTC 2024
    - 30.7K bytes
    - Viewed (0)
  6. github.com/golang/go

    src/cmd/compile/internal/ssa/_gen/PPC64Ops.go 

    		{name: "SRAD", argLength: 2, reg: gp21cxer, asm: "SRAD"}, // signed arg0 >> (arg1&127), 64 bit width (note: 127, not 63!)
		{name: "SRAW", argLength: 2, reg: gp21cxer, asm: "SRAW"}, // signed arg0 >> (arg1&63), 32 bit width
		{name: "SRD", argLength: 2, reg: gp21, asm: "SRD"},       // unsigned arg0 >> (arg1&127), 64 bit width
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 19:59:38 UTC 2024
    - 43.8K bytes
    - Viewed (0)
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