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src/cmd/asm/internal/asm/testdata/amd64error.s
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Wed Jun 14 00:03:57 GMT 2023 - 8.9K bytes - Click Count (0) -
src/cmd/asm/internal/arch/riscv64.go
} return false } // IsRISCV64VTypeI reports whether op is a vtype immediate instruction that // requires special handling. func IsRISCV64VTypeI(op obj.As) bool { return op == riscv.AVSETVLI || op == riscv.AVSETIVLI } // IsRISCV64CSRO reports whether the op is an instruction that uses // CSR symbolic names and whether that instruction expects a register // or an immediate source operand.
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Fri Sep 12 08:12:45 GMT 2025 - 2.8K bytes - Click Count (0) -
src/cmd/asm/internal/arch/arm.go
// BFX-like instructions which are in the form of "op $width, $LSB, (Reg,) Reg". func IsARMBFX(op obj.As) bool { switch op { case arm.ABFX, arm.ABFXU, arm.ABFC, arm.ABFI: return true } return false } // IsARMFloatCmp reports whether the op is a floating comparison instruction. func IsARMFloatCmp(op obj.As) bool { switch op {
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Wed Oct 23 15:18:14 GMT 2024 - 6.1K bytes - Click Count (0) -
src/cmd/asm/internal/asm/line_test.go
{"VADDPD.RZ_SAE.SAE X0, X1, X2", `bad suffix combination`}, // BSWAP on 16-bit registers is undefined. See #29167, {"BSWAPW DX", `unrecognized instruction`}, {"BSWAPW R11", `unrecognized instruction`}, }) } func testBadInstParser(t *testing.T, goarch string, tests []badInstTest) { for i, test := range tests { arch, ctxt := setArch(goarch)Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Tue Aug 29 07:48:38 GMT 2023 - 1.9K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/386.s
// This input was created by taking the instruction productions in // the old assembler's (8a's) grammar and hand-writing complete // instructions for each rule, to guarantee we cover the same space. #include "../../../../../runtime/textflag.h" TEXT foo(SB), DUPOK|NOSPLIT, $0 // LTYPE1 nonrem { outcode(int($1), &$2); } SETCC AX SETCC foo+4(SB) // LTYPE2 rimnon { outcode(int($1), &$2); } DIVB AX DIVB foo+4(SB) PUSHL $foo+4(SB)
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Tue Apr 09 18:57:21 GMT 2019 - 2K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/amd64.s
// Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. // This input was created by taking the instruction productions in // the old assembler's (6a's) grammar and hand-writing complete // instructions for each rule, to guarantee we cover the same space. #include "../../../../../runtime/textflag.h" TEXT foo(SB), DUPOK|NOSPLIT, $0
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Tue Apr 09 18:57:21 GMT 2019 - 3.3K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/loong64.s
// Copyright 2022 The Go Authors. All rights reserved. // Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. #include "../../../../../runtime/textflag.h" // TODO: cover more instruction TEXT foo(SB),DUPOK|NOSPLIT,$0 JAL 1(PC) //CALL 1(PC) //00040054 JAL (R4) //CALL (R4) //8100004c // relocation in play so the assembled offset should be 0
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Wed Mar 22 18:50:59 GMT 2023 - 434 bytes - Click Count (0) -
src/cmd/asm/internal/arch/arm64.go
// one of the comparison instructions that require special handling. func IsARM64ADR(op obj.As) bool { switch op { case arm64.AADR, arm64.AADRP: return true } return false } // IsARM64CMP reports whether the op (as defined by an arm64.A* constant) is // one of the comparison instructions that require special handling. func IsARM64CMP(op obj.As) bool { switch op {
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Thu Oct 16 00:35:29 GMT 2025 - 6.3K bytes - Click Count (0) -
src/cmd/asm/internal/arch/mips.go
// one of the CMP instructions that require special handling. func IsMIPSCMP(op obj.As) bool { switch op { case mips.ACMPEQF, mips.ACMPEQD, mips.ACMPGEF, mips.ACMPGED, mips.ACMPGTF, mips.ACMPGTD: return true } return false } // IsMIPSMUL reports whether the op (as defined by an mips.A* constant) is // one of the MUL/DIV/REM/MADD/MSUB instructions that require special handling.
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Wed Mar 04 19:06:44 GMT 2020 - 1.7K bytes - Click Count (0) -
src/cmd/asm/internal/arch/s390x.go
// Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. // This file encapsulates some of the odd characteristics of the // s390x instruction set, to minimize its interaction // with the core of the assembler. package arch import ( "cmd/internal/obj/s390x" ) func jumpS390x(word string) bool { switch word { case "BRC", "BC",
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Thu Oct 17 14:55:25 GMT 2019 - 1.2K bytes - Click Count (0)