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Results 1 - 10 of 327 for movbe (0.04 sec)

  1. src/cmd/asm/internal/asm/testdata/loong64enc2.s

    	MOVV	R4, name(SB)		// 1e00001ac403c029
    	MOVB	R4, name(SB)		// 1e00001ac4030029
    	MOVBU	R4, name(SB)		// 1e00001ac4030029
    	MOVF	F4, name(SB)		// 1e00001ac403402b
    	MOVD	F4, name(SB)		// 1e00001ac403c02b
    	MOVW	name(SB), R4		// 1e00001ac4038028
    	MOVWU	name(SB), R4		// 1e00001ac403802a
    	MOVV	name(SB), R4		// 1e00001ac403c028
    	MOVB	name(SB), R4		// 1e00001ac4030028
    	MOVBU	name(SB), R4		// 1e00001ac403002a
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 10 15:50:11 UTC 2023
    - 3K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/loong64enc1.s

    	MOVWU	R4, result+16(FP)	// 64608029
    	MOVV	R4, result+16(FP)	// 6460c029
    	MOVB	R4, result+16(FP)	// 64600029
    	MOVBU	R4, result+16(FP)	// 64600029
    	MOVWL	R4, result+16(FP)	// 6460002f
    	MOVVL	R4, result+16(FP)	// 6460802f
    	MOVW	R4, 1(R5)		// a4048029
    	MOVWU	R4, 1(R5)		// a4048029
    	MOVV	R4, 1(R5)		// a404c029
    	MOVB	R4, 1(R5)		// a4040029
    	MOVBU	R4, 1(R5)		// a4040029
    	MOVWL	R4, 1(R5)		// a404002f
    	MOVVL	R4, 1(R5)		// a404802f
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 02:04:54 UTC 2024
    - 8.2K bytes
    - Viewed (0)
  3. src/internal/runtime/atomic/atomic_mips64x.s

    	RET
    
    TEXT ·Store8(SB), NOSPLIT, $0-9
    	MOVV	ptr+0(FP), R1
    	MOVB	val+8(FP), R2
    	SYNC
    	MOVB	R2, 0(R1)
    	SYNC
    	RET
    
    TEXT ·Store64(SB), NOSPLIT, $0-16
    	MOVV	ptr+0(FP), R1
    	MOVV	val+8(FP), R2
    	SYNC
    	MOVV	R2, 0(R1)
    	SYNC
    	RET
    
    // void	Or8(byte volatile*, byte);
    TEXT ·Or8(SB), NOSPLIT, $0-9
    	MOVV	ptr+0(FP), R1
    	MOVBU	val+8(FP), R2
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat May 11 21:29:34 UTC 2024
    - 7.2K bytes
    - Viewed (0)
  4. src/cmd/internal/obj/mips/anames.go

    	"CMOVZ",
    	"CMPEQD",
    	"CMPEQF",
    	"CMPGED",
    	"CMPGEF",
    	"CMPGTD",
    	"CMPGTF",
    	"DIV",
    	"DIVD",
    	"DIVF",
    	"DIVU",
    	"DIVW",
    	"GOK",
    	"LL",
    	"LLV",
    	"LUI",
    	"MADD",
    	"MOVB",
    	"MOVBU",
    	"MOVD",
    	"MOVDF",
    	"MOVDW",
    	"MOVF",
    	"MOVFD",
    	"MOVFW",
    	"MOVH",
    	"MOVHU",
    	"MOVW",
    	"MOVWD",
    	"MOVWF",
    	"MOVWL",
    	"MOVWR",
    	"MSUB",
    	"MUL",
    	"MULD",
    	"MULF",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 1.4K bytes
    - Viewed (0)
  5. src/internal/runtime/atomic/atomic_riscv64.s

    // func And8(ptr *uint8, val uint8)
    TEXT ·And8(SB), NOSPLIT, $0-9
    	MOV	ptr+0(FP), A0
    	MOVBU	val+8(FP), A1
    	AND	$3, A0, A2
    	AND	$-4, A0
    	SLL	$3, A2
    	XOR	$255, A1
    	SLL	A2, A1
    	XOR	$-1, A1
    	AMOANDW A1, (A0), ZERO
    	RET
    
    // func Or8(ptr *uint8, val uint8)
    TEXT ·Or8(SB), NOSPLIT, $0-9
    	MOV	ptr+0(FP), A0
    	MOVBU	val+8(FP), A1
    	AND	$3, A0, A2
    	AND	$-4, A0
    	SLL	$3, A2
    	SLL	A2, A1
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 25 19:53:03 UTC 2024
    - 7K bytes
    - Viewed (0)
  6. src/cmd/asm/internal/asm/testdata/riscv64error.s

    	MOV	$1234, 8(SP)			// ERROR "constant load must target register"
    	MOVB	$1, X5				// ERROR "unsupported constant load"
    	MOVH	$1, X5				// ERROR "unsupported constant load"
    	MOVW	$1, X5				// ERROR "unsupported constant load"
    	MOVF	$1, X5				// ERROR "unsupported constant load"
    	MOVBU	X5, (X6)			// ERROR "unsupported unsigned store"
    	MOVHU	X5, (X6)			// ERROR "unsupported unsigned store"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sun Apr 07 03:32:27 UTC 2024
    - 2.8K bytes
    - Viewed (0)
  7. src/cmd/internal/obj/loong64/anames.go

    	"LU32ID",
    	"LU52ID",
    	"PCALAU12I",
    	"PCADDU12I",
    	"JIRL",
    	"BGE",
    	"BLT",
    	"BLTU",
    	"BGEU",
    	"DIV",
    	"DIVD",
    	"DIVF",
    	"DIVU",
    	"DIVW",
    	"LL",
    	"LLV",
    	"LUI",
    	"MOVB",
    	"MOVBU",
    	"MOVD",
    	"MOVDF",
    	"MOVDW",
    	"MOVF",
    	"MOVFD",
    	"MOVFW",
    	"MOVH",
    	"MOVHU",
    	"MOVW",
    	"MOVWD",
    	"MOVWF",
    	"MOVWL",
    	"MOVWR",
    	"MUL",
    	"MULD",
    	"MULF",
    	"MULU",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 02:04:54 UTC 2024
    - 1.9K bytes
    - Viewed (0)
  8. src/cmd/internal/obj/arm64/doc.go

    	MOVD.P -8(R10), R8         <=>      ldr x8, [x10],#-8
    	MOVB.W 16(R16), R10        <=>      ldrsb x10, [x16,#16]!
    	MOVBU.W 16(R16), R10       <=>      ldrb x10, [x16,#16]!
    
    3. Go uses a series of MOV instructions as load and store.
    
    64-bit variant ldr, str, stur => MOVD;
    32-bit variant str, stur, ldrsw => MOVW;
    32-bit variant ldr => MOVWU;
    ldrb => MOVBU; ldrh => MOVHU;
    ldrsb, sturb, strb => MOVB;
    ldrsh, sturh, strh =>  MOVH.
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Aug 07 00:21:42 UTC 2023
    - 9.6K bytes
    - Viewed (0)
  9. src/internal/runtime/atomic/atomic_arm64.s

    TEXT ·Cas(SB), NOSPLIT, $0-17
    	MOVD	ptr+0(FP), R0
    	MOVW	old+8(FP), R1
    	MOVW	new+12(FP), R2
    #ifndef GOARM64_LSE
    	MOVBU	internal∕cpu·ARM64+const_offsetARM64HasATOMICS(SB), R4
    	CBZ 	R4, load_store_loop
    #endif
    	MOVD	R1, R3
    	CASALW	R3, (R0), R2
    	CMP 	R1, R3
    	CSET	EQ, R0
    	MOVB	R0, ret+16(FP)
    	RET
    #ifndef GOARM64_LSE
    load_store_loop:
    	LDAXRW	(R0), R3
    	CMPW	R1, R3
    	BNE	ok
    	STLXRW	R2, (R0), R3
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 25 19:53:03 UTC 2024
    - 9K bytes
    - Viewed (0)
  10. src/internal/bytealg/compare_riscv64.s

    	BLT	X5, X6, check4_unaligned
    compare8_unaligned:
    	MOVBU	0(X10), X8
    	MOVBU	1(X10), X15
    	MOVBU	2(X10), X17
    	MOVBU	3(X10), X19
    	MOVBU	4(X10), X21
    	MOVBU	5(X10), X23
    	MOVBU	6(X10), X25
    	MOVBU	7(X10), X29
    	MOVBU	0(X12), X9
    	MOVBU	1(X12), X16
    	MOVBU	2(X12), X18
    	MOVBU	3(X12), X20
    	MOVBU	4(X12), X22
    	MOVBU	5(X12), X24
    	MOVBU	6(X12), X28
    	MOVBU	7(X12), X30
    	BNE	X8, X9, cmp1a
    	BNE	X15, X16, cmp1b
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Nov 09 13:57:06 UTC 2023
    - 3.9K bytes
    - Viewed (0)
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