- Sort Score
- Result 10 results
- Languages All
Results 1 - 10 of 20 for ANDQ (0.04 sec)
-
src/crypto/internal/edwards25519/field/fe_amd64.s
SHLQ $0x0d, DI, SI SHLQ $0x0d, R9, R8 SHLQ $0x0d, R11, R10 SHLQ $0x0d, R13, R12 SHLQ $0x0d, R15, R14 ANDQ AX, DI IMUL3Q $0x13, R14, R14 ADDQ R14, DI ANDQ AX, R9 ADDQ SI, R9 ANDQ AX, R11 ADDQ R8, R11 ANDQ AX, R13 ADDQ R10, R13 ANDQ AX, R15 ADDQ R12, R15 // Second reduction chain (carryPropagate) MOVQ DI, SI SHRQ $0x33, SI MOVQ R9, R8
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 5.7K bytes - Viewed (0) -
src/internal/bytealg/count_amd64.s
// Exit AVX mode. VZEROUPPER SALQ $32, CX ORQ CX, DX // Create mask to ignore overlap between previous 64 byte block // and the next. ANDQ $63, BX MOVQ $64, CX SUBQ BX, CX MOVQ $0xFFFFFFFFFFFFFFFF, R10 SALQ CL, R10 // Apply mask ANDQ R10, DX POPCNTQ DX, DX ADDQ DX, R12 MOVQ R12, (R8) RET endavx: // Exit AVX mode. VZEROUPPER MOVQ R12, (R8)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Oct 06 20:54:43 UTC 2023 - 4.7K bytes - Viewed (0) -
test/codegen/logic.go
// Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. package codegen // Test to make sure that (CMPQ (ANDQ x y) [0]) does not get rewritten to // (TESTQ x y) if the ANDQ has other uses. If that rewrite happens, then one // of the args of the ANDQ needs to be saved so it can be used as the arg to TESTQ. func andWithUse(x, y int) int { z := x & y
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 10 16:32:25 UTC 2023 - 1.1K bytes - Viewed (0) -
test/codegen/rotate.go
var a uint16 z &= 15 // amd64:"ROLW",-"ANDQ" // riscv64: "OR","SLL","SRL",-"AND\t" a += x<<z | x>>(16-z) // amd64:"RORW",-"ANDQ" // riscv64: "OR","SLL","SRL",-"AND\t" a += x>>z | x<<(16-z) return a } func rot8nc(x uint8, z uint) uint8 { var a uint8 z &= 7 // amd64:"ROLB",-"ANDQ" // riscv64: "OR","SLL","SRL",-"AND\t" a += x<<z | x>>(8-z)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 6K bytes - Viewed (0) -
src/vendor/golang.org/x/crypto/internal/poly1305/sum_amd64.s
ADCQ $0, t3; \ \ MOVQ t0, h0; \ MOVQ t1, h1; \ MOVQ t2, h2; \ ANDQ $3, h2; \ MOVQ t2, t0; \ ANDQ $0xFFFFFFFFFFFFFFFC, t0; \ ADDQ t0, h0; \ ADCQ t3, h1; \ ADCQ $0, h2; \ SHRQ $2, t3, t2; \
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:33 UTC 2023 - 2.5K bytes - Viewed (0) -
src/runtime/libfuzzer_amd64.s
MOVQ g_m(R14), R13 // Switch to g0 stack. MOVQ SP, R12 // callee-saved, preserved across the CALL MOVQ m_g0(R13), R10 CMPQ R10, R14 JE call // already on g0 MOVQ (g_sched+gobuf_sp)(R10), SP call: ANDQ $~15, SP // alignment for gcc ABI CALL AX MOVQ R12, SP RET // void runtime·libfuzzerCallTraceIntCmp(fn, arg0, arg1, fakePC uintptr) // Calls C function fn from libFuzzer and passes 2 arguments to it after
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 10 04:57:07 UTC 2023 - 5K bytes - Viewed (0) -
src/runtime/rt0_windows_amd64.s
TEXT _rt0_amd64_windows_lib(SB),NOSPLIT|NOFRAME,$40 // Create a new thread to do the runtime initialization and return. MOVQ BX, 32(SP) // callee-saved, preserved across the CALL MOVQ SP, BX ANDQ $~15, SP // alignment as per Windows requirement MOVQ _cgo_sys_thread_create(SB), AX MOVQ $_rt0_amd64_windows_lib_go(SB), CX MOVQ $0, DX CALL AX MOVQ BX, SP MOVQ 32(SP), BX RET
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jul 19 11:55:15 UTC 2023 - 1.1K bytes - Viewed (0) -
src/runtime/test_amd64.s
// Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. // Create a large frame to force stack growth. See #62326. TEXT ·testSPWrite(SB),0,$16384-0 // Write to SP MOVQ SP, AX ANDQ $~0xf, SP MOVQ AX, SP
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Nov 17 23:34:11 UTC 2023 - 316 bytes - Viewed (0) -
src/internal/bytealg/compare_amd64.s
// AX and CX contain parts of a and b that differ. diff8: BSWAPQ AX // reverse order of bytes BSWAPQ CX XORQ AX, CX BSRQ CX, CX // index of highest bit difference SHRQ CX, AX // move a's bit to bottom ANDQ $1, AX // mask bit LEAQ -1(AX*2), AX // 1/0 => +1/-1 RET // 0-7 bytes in common small: LEAQ (R8*8), CX // bytes left -> bits left NEGQ CX // - bits lift (== 64 - bits left mod 64) JEQ allsame
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Aug 18 17:17:01 UTC 2022 - 4.3K bytes - Viewed (0) -
src/runtime/msan_amd64.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Jan 09 01:36:54 UTC 2024 - 2.3K bytes - Viewed (0)