namespace mlir {
namespace tf_device {

// The TensorFlow Device dialect.
//
// This dialect contains operations to describe/launch computations on devices.
// These operations do not map 1-1 to TensorFlow ops and requires a lowering
// pass later to transform them into Compile/Run op pairs, like XlaCompile and
// XlaRun.
class TensorFlowDeviceDialect : public Dialect {
 public:
  static StringRef getDialectNamespace() { return "tf_device"; }

using ::tensorflow::thread::ThreadPoolInterface;

using ::tensorflow::tfrt_stub::FallbackTensor;

// -------------------------------------------------------------------------- //
// Run function via the TF->TFRT fallback lowering.
// -------------------------------------------------------------------------- //

namespace {
// Thread pool for running `intra-op` tasks scheduled by the fallback kernels.

// Creates an instance of the VerifyQuantLegalization pass, which verifies all
// quant ops and types are lowered.
std::unique_ptr<OperationPass<func::FuncOp>>
CreateVerifyQuantLegalizationPass();

// Add all passes for lowering TF quant ops and types to MHLO int.
void AddQuantizationLoweringPasses(mlir::OpPassManager &pm);

// Creates an instance of OptimizeIntGraphPass, which optimizes the int graph
// lowered from the quantized graph.

(Neg64F ...) => (FNEG ...)

(Com64 ...) => (NOT ...)
(Com(32|16|8) ...) => (NOTW ...)
(NOT x) => (XOR (MOVDconst [-1]) x)
(NOTW x) => (XORWconst [-1] x)

// Lowering boolean ops
(AndB ...) => (ANDW ...)
(OrB ...) => (ORW ...)
(Not x) => (XORWconst [1] x)

// Lowering pointer arithmetic
(OffPtr [off] ptr:(SP)) => (MOVDaddr [int32(off)] ptr)
(OffPtr [off] ptr) && is32Bit(off) => (ADDconst [int32(off)] ptr)

limitations under the License.
==============================================================================*/

// Declare bridge passes that perform legalization and/or lowering.

include "mlir/Pass/PassBase.td"

def ConvertTFQuantOpsToMHLO : Pass<"quant-convert-tf-quant-ops-to-mhlo", "mlir::func::FuncOp"> {
  let summary = "Convert TF Quant ops to MHLO quantizated ops.";

  target.addLegalDialect<arith::ArithDialect>();

  if (failed(applyPartialConversion(getOperation(), target,
                                    std::move(patterns)))) {
    getOperation().emitError("Composite lowering pass failed.");
    signalPassFailure();
  }
}

}  // namespace

// Creates an instance of the pass.
std::unique_ptr<OperationPass<ModuleOp>> CreateCompositeLoweringPass() {

	// s390x:-".*memmove"
	// amd64:-".*memmove"
	// ppc64x:-".*memmove"
	// ppc64x/power8:"LXVD2X"
	// ppc64x/power9:"LXV",-"LXVD2X"
	copy(a[:], a[128:])
}

// Check arch-specific memmove lowering. See issue 41662 fot details

func moveArchLowering1(b []byte, x *[1]byte) {
	_ = b[1]
	// amd64:-".*memmove"
	// arm64:-".*memmove"
	// ppc64x:-".*memmove"
	copy(b, x[:])
}

		nproc = 7
	}
	if setNproc {
		var rlim syscall.Rlimit
		if syscall.Getrlimit(nproc, &rlim) == nil {
			max := int(rlim.Cur) / (threads + 5)
			if attempts > max {
				t.Logf("lowering attempts from %d to %d for RLIMIT_NPROC", attempts, max)
				attempts = max
			}
		}
	}

	if os.Getenv("test18146") == "exec" {
		runtime.GOMAXPROCS(1)
		for n := threads; n > 0; n-- {
			go func() {

(Neg64F x) => (PXOR x (MOVSDconst <typ.Float64> [math.Copysign(0, -1)]))

// Lowering boolean ops
(AndB ...) => (ANDL ...)
(OrB ...) => (ORL ...)
(Not x) => (XORLconst [1] x)

// Lowering pointer arithmetic
(OffPtr [off] ptr) && is32Bit(off) => (ADDQconst [int32(off)] ptr)
(OffPtr [off] ptr) => (ADDQ (MOVQconst [off]) ptr)

// Lowering other arithmetic
(Ctz64 x)     && buildcfg.GOAMD64 >= 3 => (TZCNTQ x)

See the License for the specific language governing permissions and
limitations under the License.
==============================================================================*/

// Pattern definition file for direct lowering of mhlo composites to tflite ops.
include "mlir/IR/OpBase.td"
include "mlir/Dialect/Arith/IR/ArithOps.td"
include "mlir/Dialect/Func/IR/FuncOps.td"
include "mhlo/IR/hlo_ops.td"