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Results 21 - 30 of 62 for jnle (0.04 sec)
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src/internal/bytealg/equal_amd64.s
// CX = size (want in BX) CMPQ AX, BX JNE neq MOVQ $1, AX // return 1 RET neq: MOVQ AX, SI MOVQ BX, DI MOVQ CX, BX JMP memeqbody<>(SB) // memequal_varlen(a, b unsafe.Pointer) bool TEXT runtime·memequal_varlen<ABIInternal>(SB),NOSPLIT,$0-17 // AX = a (want in SI) // BX = b (want in DI) // 8(DX) = size (want in BX) CMPQ AX, BX JNE neq MOVQ $1, AX // return 1 RET neq:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Nov 17 16:34:40 UTC 2023 - 2.8K bytes - Viewed (0) -
src/runtime/memclr_plan9_386.s
JEQ _0 CMPL BX, $2 JBE _1or2 CMPL BX, $4 JB _3 JE _4 CMPL BX, $8 JBE _5through8 CMPL BX, $16 JBE _9through16 MOVL BX, CX SHRL $2, CX REP STOSL ANDL $3, BX JNE tail RET _1or2: MOVB AX, (DI) MOVB AX, -1(DI)(BX*1) RET _0: RET _3: MOVW AX, (DI) MOVB AX, 2(DI) RET _4: // We need a separate case for 4 to make sure we clear pointers atomically.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jan 29 19:11:07 UTC 2021 - 983 bytes - Viewed (0) -
src/runtime/asm_amd64.s
// find out information about the processor we're on MOVL $0, AX CPUID CMPL AX, $0 JE nocpuinfo CMPL BX, $0x756E6547 // "Genu" JNE notintel CMPL DX, $0x49656E69 // "ineI" JNE notintel CMPL CX, $0x6C65746E // "ntel" JNE notintel MOVB $1, runtime·isIntel(SB) notintel: // Load EAX=1 cpuid flags MOVL $1, AX CPUID MOVL AX, runtime·processorVersionInfo(SB)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat May 11 20:38:24 UTC 2024 - 60.4K bytes - Viewed (0) -
src/runtime/asm_386.s
has_cpuid: MOVL $0, AX CPUID MOVL AX, SI CMPL AX, $0 JE nocpuinfo CMPL BX, $0x756E6547 // "Genu" JNE notintel CMPL DX, $0x49656E69 // "ineI" JNE notintel CMPL CX, $0x6C65746E // "ntel" JNE notintel MOVB $1, runtime·isIntel(SB) notintel: // Load EAX=1 cpuid flags MOVL $1, AX CPUID MOVL CX, DI // Move to global variable clobbers CX when generating PIC
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 15 15:45:13 UTC 2024 - 43.1K bytes - Viewed (0) -
src/runtime/memclr_386.s
MOVOU X0, -64(DI)(BX*1) MOVOU X0, -48(DI)(BX*1) MOVOU X0, -32(DI)(BX*1) MOVOU X0, -16(DI)(BX*1) RET nosse2: MOVL BX, CX SHRL $2, CX REP STOSL ANDL $3, BX JNE tail
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat Nov 06 10:24:44 UTC 2021 - 2.4K bytes - Viewed (0) -
src/runtime/sys_solaris_amd64.s
MOVQ BX, 24(SP) MOVQ BP, 32(SP) MOVQ R12, 40(SP) MOVQ R13, 48(SP) MOVQ R14, 56(SP) MOVQ R15, 64(SP) get_tls(BX) // check that g exists MOVQ g(BX), R10 CMPQ R10, $0 JNE allgood MOVQ SI, 72(SP) MOVQ DX, 80(SP) LEAQ 72(SP), AX MOVQ DI, 0(SP) MOVQ AX, 8(SP) MOVQ $runtime·badsignal(SB), AX CALL AX JMP exit allgood:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 19:29:00 UTC 2023 - 6.4K bytes - Viewed (0) -
src/math/hypot_386.s
FUCOMI F0, F1 // compare F0 to F1 JCC 2(PC) // jump if F0 >= F1 FXCHD F0, F1 // F0=|p| (larger), F1=|q| (smaller) FTST // compare F0 to 0 FSTSW AX ANDW $0x4000, AX JNE 10(PC) // jump if F0 = 0 FXCHD F0, F1 // F0=q (smaller), F1=p (larger) FDIVD F1, F0 // F0=q(=q/p), F1=p FMULD F0, F0 // F0=q*q, F1=p FLD1 // F0=1, F1=q*q, F2=p
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Apr 15 15:48:19 UTC 2021 - 1.8K bytes - Viewed (0) -
src/runtime/memclr_amd64.s
JBE _17through32 CMPQ BX, $64 JBE _33through64 CMPQ BX, $128 JBE _65through128 CMPQ BX, $256 JBE _129through256 CMPB internal∕cpu·X86+const_offsetX86HasERMS(SB), $1 // enhanced REP MOVSB/STOSB JNE skip_erms // If the size is less than 2kb, do not use ERMS as it has a big start-up cost. // Table 3-4. Relative Performance of Memcpy() Using ERMSB Vs. 128-bit AVX
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue May 10 20:52:34 UTC 2022 - 4.9K bytes - Viewed (0) -
src/runtime/time_linux_amd64.s
MOVQ CX, 0(SP) MOVQ DX, 8(SP) LEAQ sec+0(FP), DX MOVQ -8(DX), CX // Sets CX to function return address. MOVQ CX, m_vdsoPC(BX) MOVQ DX, m_vdsoSP(BX) CMPQ R14, m_curg(BX) // Only switch if on curg. JNE noswitch MOVQ m_g0(BX), DX MOVQ (g_sched+gobuf_sp)(DX), SP // Set SP to g0 stack noswitch: SUBQ $32, SP // Space for two time results ANDQ $~15, SP // Align for C code MOVL $0, DI // CLOCK_REALTIME
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat Nov 06 10:24:44 UTC 2021 - 2K bytes - Viewed (0) -
src/internal/bytealg/indexbyte_amd64.s
BSFL DX, DX // Find first set bit. JZ failure // No set bit, failure. MOVQ DX, (R8) RET avx2: #ifndef hasAVX2 CMPB internal∕cpu·X86+const_offsetX86HasAVX2(SB), $1 JNE sse #endif MOVD AX, X0 LEAQ -32(SI)(BX*1), R11 VPBROADCASTB X0, Y1 PCALIGN $32 avx2_loop: VMOVDQU (DI), Y2 VPCMPEQB Y1, Y2, Y3 VPTEST Y3, Y3 JNZ avx2success ADDQ $32, DI
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 01 19:06:01 UTC 2023 - 3.1K bytes - Viewed (0)