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Results 21 - 30 of 35 for XORL (0.04 sec)
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src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
{name: "XORLloadidx1", argLength: 4, reg: gp21loadidx, asm: "XORL", scale: 1, aux: "SymOff", resultInArg0: true, clobberFlags: true, symEffect: "Read"}, {name: "XORLloadidx4", argLength: 4, reg: gp21loadidx, asm: "XORL", scale: 4, aux: "SymOff", resultInArg0: true, clobberFlags: true, symEffect: "Read"}, {name: "XORLloadidx8", argLength: 4, reg: gp21loadidx, asm: "XORL", scale: 8, aux: "SymOff", resultInArg0: true, clobberFlags: true, symEffect: "Read"},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 04 16:40:24 UTC 2023 - 98K bytes - Viewed (1) -
src/runtime/sys_windows_386.s
CALL tstart<>(SB) POPL BX // Adjust stack for stdcall to return properly. MOVL (SP), AX // save return address ADDL $4, SP // remove single parameter MOVL AX, (SP) // restore return address XORL AX, AX // return 0 == success RET // setldt(int slot, int base, int size) TEXT runtime·setldt(SB),NOSPLIT,$0-12 MOVL base+4(FP), DX MOVL runtime·tls_g(SB), CX MOVL DX, 0(CX)(FS) RET
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Sep 21 15:56:43 UTC 2023 - 6.5K bytes - Viewed (0) -
test/codegen/math.go
return math.Float32frombits(u32+1) + 1 } // Test that comparisons with constants converted to float // are evaluated at compile-time func constantCheck64() bool { // amd64:"(MOVB\t[$]0)|(XORL\t[A-Z][A-Z0-9]+, [A-Z][A-Z0-9]+)",-"FCMP",-"MOVB\t[$]1" // s390x:"MOV(B|BZ|D)\t[$]0,",-"FCMPU",-"MOV(B|BZ|D)\t[$]1," return 0.5 == float64(uint32(1)) || 1.5 > float64(uint64(1<<63)) } func constantCheck32() bool {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Apr 04 15:24:29 UTC 2024 - 6.2K bytes - Viewed (0) -
src/internal/runtime/atomic/atomic_386.s
MOVQ val+4(FP), M0 MOVQ M0, (AX) EMMS // This is essentially a no-op, but it provides required memory fencing. // It can be replaced with MFENCE, but MFENCE was introduced only on the Pentium4 (SSE2). XORL AX, AX LOCK XADDL AX, (SP) RET // void ·Or8(byte volatile*, byte); TEXT ·Or8(SB), NOSPLIT, $0-5 MOVL ptr+0(FP), AX MOVB val+4(FP), BX LOCK ORB BX, (AX) RET
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 25 19:53:03 UTC 2024 - 6.5K bytes - Viewed (0) -
src/runtime/sys_solaris_amd64.s
MOVQ AX, g_stackguard0(DX) MOVQ AX, g_stackguard1(DX) // Someday the convention will be D is always cleared. CLD CALL runtime·stackcheck(SB) // clobbers AX,CX CALL runtime·mstart(SB) XORL AX, AX // return 0 == success MOVL AX, ret+8(FP) RET // Careful, this is called by __sighndlr, a libc function. We must preserve // registers as per AMD 64 ABI.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 19:29:00 UTC 2023 - 6.4K bytes - Viewed (0) -
src/runtime/sys_windows_amd64.s
LEAQ m_tls(CX), DI MOVQ CX, g_m(DX) MOVQ DX, g(DI) CALL runtime·settls(SB) // clobbers CX CALL runtime·stackcheck(SB) // clobbers AX,CX CALL runtime·mstart(SB) POP_REGS_HOST_TO_ABI0() XORL AX, AX // return 0 == success RET // set tls base to DI TEXT runtime·settls(SB),NOSPLIT,$0 MOVQ runtime·tls_g(SB), CX MOVQ DI, 0(CX)(GS) RET TEXT runtime·nanotime1(SB),NOSPLIT,$0-8
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Feb 19 07:24:08 UTC 2024 - 8.4K bytes - Viewed (0) -
src/cmd/internal/obj/x86/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 11 18:32:50 UTC 2023 - 19.1K bytes - Viewed (0) -
src/crypto/aes/gcm_amd64.s
#define ptx SI #define ks AX #define tPtr R8 #define ptxLen R9 #define aluCTR R10 #define aluTMP R11 #define aluK R12 #define NR R13 #define increment(i) ADDL $1, aluCTR; MOVL aluCTR, aluTMP; XORL aluK, aluTMP; BSWAPL aluTMP; MOVL aluTMP, (3*4 + 8*16 + i*16)(SP) #define aesRnd(k) AESENC k, B0; AESENC k, B1; AESENC k, B2; AESENC k, B3; AESENC k, B4; AESENC k, B5; AESENC k, B6; AESENC k, B7
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 23.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64enc.s
XORL DX, (BX) // 3113 XORL R11, (BX) // 44311b XORL DX, (R11) // 413113 XORL R11, (R11) // 45311b XORL DX, DX // 31d2 or 33d2 XORL R11, DX // 4431da or 4133d3 XORL DX, R11 // 4131d3 or 4433da
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Oct 08 21:38:44 UTC 2021 - 581.9K bytes - Viewed (0) -
src/runtime/asm_386.s
MOVL SP, (g_stack+stack_hi)(BP) // find out information about the processor we're on // first see if CPUID instruction is supported. PUSHFL PUSHFL XORL $(1<<21), 0(SP) // flip ID bit POPFL PUSHFL POPL AX XORL 0(SP), AX POPFL // restore EFLAGS TESTL $(1<<21), AX JNE has_cpuid bad_proc: // show that the program requires MMX. MOVL $2, 0(SP) MOVL $bad_proc_msg<>(SB), 4(SP)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 15 15:45:13 UTC 2024 - 43.1K bytes - Viewed (0)