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Results 11 - 20 of 33 for rldic (0.05 sec)
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src/cmd/internal/obj/ppc64/doc.go
More recently, Go opcodes were added which map directly onto the PPC64 opcodes. It is recommended to use the newer opcodes to avoid confusion. RLDICL $0,R4,$15,R6 => rldicl r6,r4,0,15 RLDICR $0,R4,$15,R6 => rldicr r6.r4,0,15 # Register naming 1. Special register usage in Go asm The following registers should not be modified by user Go assembler code.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 16:47:45 UTC 2023 - 11.3K bytes - Viewed (0) -
test/codegen/constants.go
// ppc64x: "MOVD\t[$]-1", "RLDC\tR[0-9]+, [$]44, [$]63," out[0] = 0xFFFFF00000000001 // ppc64x: "MOVD\t[$]-1", "RLDC\tR[0-9]+, [$]43, [$]63," out[1] = 0xFFFFF80000000001 // ppc64x: "MOVD\t[$]-1", "RLDC\tR[0-9]+, [$]43, [$]4," out[2] = 0x0FFFF80000000000 // ppc64x/power8: "MOVD\t[$]-1", "RLDC\tR[0-9]+, [$]33, [$]63," // ppc64x/power9: "MOVD\t[$]-1", "RLDC\tR[0-9]+, [$]33, [$]63,"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 05 14:03:32 UTC 2023 - 1.1K bytes - Viewed (0) -
test/codegen/bits.go
// ppc64x: "RLDICR\t[$]0, R[0-9]*, [$]47, R" io64[0] = io64[0] & 0xFFFFFFFFFFFF0000 // ppc64x: "RLDICL\t[$]0, R[0-9]*, [$]16, R" io64[1] = io64[1] & 0x0000FFFFFFFFFFFF // ppc64x: -"SRD", -"AND", "RLDICL\t[$]60, R[0-9]*, [$]16, R" io64[2] = (io64[2] >> 4) & 0x0000FFFFFFFFFFFF // ppc64x: -"SRD", -"AND", "RLDICL\t[$]36, R[0-9]*, [$]28, R" io64[3] = (io64[3] >> 28) & 0x0000FFFFFFFFFFFF
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 7.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewritePPC64latelower.go
v.AddArg2(y, z) return true } return false } func rewriteValuePPC64latelower_OpPPC64RLDICL(v *Value) bool { v_0 := v.Args[0] // match: (RLDICL [em] x:(SRDconst [s] a)) // cond: (em&0xFF0000) == 0 // result: (RLDICL [mergePPC64RLDICLandSRDconst(em, s)] a) for { em := auxIntToInt64(v.AuxInt) x := v_0 if x.Op != OpPPC64SRDconst { break } s := auxIntToInt64(x.AuxInt)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 16.5K bytes - Viewed (0) -
pkg/registry/admissionregistration/validatingadmissionpolicybinding/strategy.go
oldIC := old.(*admissionregistration.ValidatingAdmissionPolicyBinding) // Any changes to the spec increment the generation number, any changes to the // status should reflect the generation number of the corresponding object. // See metav1.ObjectMeta description for more information on Generation. if !apiequality.Semantic.DeepEqual(oldIC.Spec, newIC.Spec) { newIC.Generation = oldIC.Generation + 1
Registered: Sat Jun 15 01:39:40 UTC 2024 - Last Modified: Mon Nov 07 21:29:56 UTC 2022 - 5.5K bytes - Viewed (0) -
pkg/registry/admissionregistration/validatingwebhookconfiguration/strategy.go
newIC := obj.(*admissionregistration.ValidatingWebhookConfiguration) oldIC := old.(*admissionregistration.ValidatingWebhookConfiguration) // Any changes to the spec increment the generation number, any changes to the // status should reflect the generation number of the corresponding object. // See metav1.ObjectMeta description for more information on Generation. if !reflect.DeepEqual(oldIC.Webhooks, newIC.Webhooks) { newIC.Generation = oldIC.Generation + 1
Registered: Sat Jun 15 01:39:40 UTC 2024 - Last Modified: Thu Feb 29 20:14:19 UTC 2024 - 4.1K bytes - Viewed (0) -
pkg/registry/admissionregistration/mutatingwebhookconfiguration/strategy.go
newIC := obj.(*admissionregistration.MutatingWebhookConfiguration) oldIC := old.(*admissionregistration.MutatingWebhookConfiguration) // Any changes to the spec increment the generation number, any changes to the // status should reflect the generation number of the corresponding object. // See metav1.ObjectMeta description for more information on Generation. if !reflect.DeepEqual(oldIC.Webhooks, newIC.Webhooks) { newIC.Generation = oldIC.Generation + 1
Registered: Sat Jun 15 01:39:40 UTC 2024 - Last Modified: Thu Feb 29 20:14:19 UTC 2024 - 4K bytes - Viewed (0) -
pkg/registry/admissionregistration/validatingadmissionpolicy/strategy.go
newIC := obj.(*admissionregistration.ValidatingAdmissionPolicy) oldIC := old.(*admissionregistration.ValidatingAdmissionPolicy) // Prevent any update on the Spec object from Status Strategy newIC.Spec = oldIC.Spec metav1.ResetObjectMetaForStatus(&newIC.ObjectMeta, &oldIC.ObjectMeta) // No change in the generation. }
Registered: Sat Jun 15 01:39:40 UTC 2024 - Last Modified: Wed Mar 06 00:00:21 UTC 2024 - 7.8K bytes - Viewed (0) -
test/codegen/bool.go
// amd64:"ANDL\t[$]1",-"SETB" // ppc64x:"RLDICL",-"CMP",-"ISEL" b := x&1 != 0 return c && b } func convertNeqBool32(x uint32) bool { // ppc64x:"RLDICL",-"CMPW",-"ISEL" return x&1 != 0 } func convertEqBool32(x uint32) bool { // ppc64x:"RLDICL",-"CMPW","XOR",-"ISEL" return x&1 == 0 } func convertNeqBool64(x uint64) bool { // ppc64x:"RLDICL",-"CMP",-"ISEL" return x&1 != 0 }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 13 22:12:32 UTC 2023 - 6.7K bytes - Viewed (0) -
test/codegen/arithmetic.go
// arm64:"TST\t[$]63",-"UDIV",-"ASR",-"AND" // ppc64x:"ANDCC",-"RLDICL",-"SRAD",-"CMP" a := n1%64 == 0 // signed divisible // 386:"TESTL\t[$]63",-"DIVL",-"SHRL" // amd64:"TESTQ\t[$]63",-"DIVQ",-"SHRQ" // arm:"AND\t[$]63",-".*udiv",-"SRA" // arm64:"TST\t[$]63",-"UDIV",-"ASR",-"AND" // ppc64x:"ANDCC",-"RLDICL",-"SRAD",-"CMP" b := n2%64 != 0 // signed indivisible return a, b }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 15:28:00 UTC 2024 - 15.2K bytes - Viewed (0)