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Results 11 - 20 of 159 for _conv (0.04 sec)

  1. src/cmd/asm/internal/arch/arch.go

    	for i := ppc64.REG_R0; i <= ppc64.REG_R31; i++ {
    		register[obj.Rconv(i)] = int16(i)
    	}
    	for i := ppc64.REG_F0; i <= ppc64.REG_F31; i++ {
    		register[obj.Rconv(i)] = int16(i)
    	}
    	for i := ppc64.REG_V0; i <= ppc64.REG_V31; i++ {
    		register[obj.Rconv(i)] = int16(i)
    	}
    	for i := ppc64.REG_VS0; i <= ppc64.REG_VS63; i++ {
    		register[obj.Rconv(i)] = int16(i)
    	}
    	for i := ppc64.REG_A0; i <= ppc64.REG_A7; i++ {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 21 06:51:28 UTC 2023
    - 21.3K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/pkginit/initAsanGlobals.go

    				ir.NewIndexExpr(base.Pos, globals, ir.NewInt(base.Pos, int64(i))), lname(f)), val)
    			init.Append(typecheck.Stmt(r))
    		}
    		// globals[i].beg = uintptr(unsafe.Pointer(&n))
    		c = tconv(typecheck.NodAddr(n), types.Types[types.TUNSAFEPTR])
    		c = tconv(c, types.Types[types.TUINTPTR])
    		setField("beg", c, i)
    		// Assign globals[i].size.
    		g := n.(*ir.Name)
    		size := g.Type().Size()
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Aug 17 19:36:24 UTC 2023
    - 8.7K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/quantization/tensorflow/passes/replace_cast_hacks_with_tf_xla_ops.td

    // support non-constant weights.
    def ConvertTFConv2DToXLAConvOp : Pat<
      (TF_Conv2DOp:$conv
        (TF_SubOp (TF_CastOp $input, $truncate), $input_zp),
        (TF_CastOp (TF_IdentityOp $filter), $truncate1),
        $strides, $use_cudnn, $padding, $explicit_padding,
        IsDataFormatNHWC:$data_format, $dilations),
      (CreateXLAConvOpFromTFConv2DOp
        $input, $filter, $input_zp, $conv, $strides,
        $dilations, $padding, $explicit_padding),
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Sun Dec 10 05:52:02 UTC 2023
    - 21.1K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/quantization/stablehlo/tests/bridge/optimize.mlir

        %zp_offset: tensor<?x2x2x1xi32>, %bias: tensor<1xi32>
      ) -> tensor<?x2x2x1xi32> {
      // CHECK-DAG: %[[conv:.*]] = mhlo.convolution
      // CHECK-DAG: %[[combined:.*]] = chlo.broadcast_add %[[zp_offset:.*]], %[[bias:.*]]
      // CHECK-DAG: %[[result:.*]] = chlo.broadcast_add %[[conv]], %[[combined]]
      // CHECK: return %[[result]]
      %0 = mhlo.convolution(%lhs, %rhs)
          dim_numbers = [b, 0, 1, f]x[0, 1, i, o]->[b, 0, 1, f],
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Sat Feb 24 02:26:47 UTC 2024
    - 10.7K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/quantization/stablehlo/passes/bridge/optimize.td

    def IsNull : Constraint<CPred<"!$0">>;
    
    // This pattern optimizes:
    //   conv/dot_general + a + b -> conv/dot_general + (a + b)
    //   conv/dot_general - a - b -> conv/dot_general - (a + b)
    //   conv/dot_general + a - b -> conv/dot_general + (a - b)
    //   conv/dot_general - a + b -> conv/dot_general - (a - b)
    foreach OpsTuple = [
        [CHLO_BroadcastAddOp, CHLO_BroadcastAddOp, CHLO_BroadcastAddOp],
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Sat Feb 24 02:26:47 UTC 2024
    - 2K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/lite/stablehlo/tests/legalize-tfl-stablehlo-conv.mlir

    Michael Levesque-Dion <******@****.***> 1706075999 -0800
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Jan 24 06:08:43 UTC 2024
    - 1.6K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/quantization/stablehlo/tests/pipelines/process_nchw_tensor.mlir

    // CHECK: %[[CONV:.+]] = stablehlo.convolution(%[[TRANSPOSE_0]], %[[CONST]]) dim_numbers = [b, 0, 1, f]x[0, 1, i, o]->[b, 0, 1, f], window = {pad = {{\[\[}}1, 1], [1, 1]]} {batch_group_count = 1 : i64, feature_group_count = 1 : i64} : (tensor<1x4x4x8xf32>, tensor<3x3x8x8xf32>) -> tensor<1x4x4x8xf32>
    // CHECK: %[[TRANSPOSE_1:.+]] = stablehlo.transpose %[[CONV]], dims = [0, 3, 1, 2] : (tensor<1x4x4x8xf32>) -> tensor<1x8x4x4xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 18 20:32:46 UTC 2024
    - 12.6K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/walk/assign.go

    	// if uint(newLen) <= uint(oldCap)
    	nif := ir.NewIfStmt(base.Pos, nil, nil, nil)
    	nuint := typecheck.Conv(newLen, types.Types[types.TUINT])
    	scapuint := typecheck.Conv(oldCap, types.Types[types.TUINT])
    	nif.Cond = ir.NewBinaryExpr(base.Pos, ir.OLE, nuint, scapuint)
    	nif.Likely = true
    
    	// then { s = s[:newLen] }
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 08 17:09:06 UTC 2024
    - 20.3K bytes
    - Viewed (0)
  9. src/main/assemblies/files/service.bat

    set unit=%value:~-1%
    rem assume the unit is specified
    set conv=%value:~0,-1%
    
    if "%unit%" == "k" goto kilo
    if "%unit%" == "K" goto kilo
    if "%unit%" == "m" goto mega
    if "%unit%" == "M" goto mega
    if "%unit%" == "g" goto giga
    if "%unit%" == "G" goto giga
    
    rem no unit found, must be bytes; consider the whole value
    set conv=%value%
    rem convert to KB
    set /a conv=%conv% / 1024
    :kilo
    rem convert to MB
    Registered: Wed Jun 12 13:08:18 UTC 2024
    - Last Modified: Sun Jan 15 06:32:15 UTC 2023
    - 6K bytes
    - Viewed (0)
  10. src/cmd/internal/obj/x86/list6.go

    	"MAXREG", // [MAXREG]
    }
    
    func init() {
    	obj.RegisterRegister(REG_AL, REG_AL+len(Register), rconv)
    	obj.RegisterOpcode(obj.ABaseAMD64, Anames)
    	obj.RegisterRegisterList(obj.RegListX86Lo, obj.RegListX86Hi, rlconv)
    	obj.RegisterOpSuffix("386", opSuffixString)
    	obj.RegisterOpSuffix("amd64", opSuffixString)
    }
    
    func rconv(r int) string {
    	if REG_AL <= r && r-REG_AL < len(Register) {
    		return Register[r-REG_AL]
    	}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Jun 04 07:25:06 UTC 2020
    - 4.1K bytes
    - Viewed (0)
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