Search Options

Results per page
Sort
Preferred Languages
Advance

Results 41 - 50 of 152 for r13d (0.1 sec)

  1. src/runtime/libfuzzer_amd64.s

    	MOVQ	hookId+8(FP), RARG0
    	MOVQ	s1+16(FP), RARG1
    	MOVQ	s2+24(FP), RARG2
    	MOVQ	result+32(FP), RARG3
    
    	get_tls(R12)
    	MOVQ	g(R12), R14
    	MOVQ	g_m(R14), R13
    
    	// Switch to g0 stack.
    	MOVQ	SP, R12		// callee-saved, preserved across the CALL
    	MOVQ	m_g0(R13), R10
    	CMPQ	R10, R14
    	JE	call	// already on g0
    	MOVQ	(g_sched+gobuf_sp)(R10), SP
    call:
    	ANDQ	$~15, SP	// alignment for gcc ABI
    	CALL	AX
    	MOVQ	R12, SP
    	RET
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 10 04:57:07 UTC 2023
    - 5K bytes
    - Viewed (0)
  2. src/runtime/rt0_android_arm.s

    // Use of this source code is governed by a BSD-style
    // license that can be found in the LICENSE file.
    
    #include "textflag.h"
    
    TEXT _rt0_arm_android(SB),NOSPLIT|NOFRAME,$0
    	MOVW		(R13), R0      // argc
    	MOVW		$4(R13), R1    // argv
    	MOVW		$_rt0_arm_linux1(SB), R4
    	B		(R4)
    
    TEXT _rt0_arm_android_lib(SB),NOSPLIT,$0
    	MOVW	$1, R0                          // argc
    	MOVW	$_rt0_arm_android_argv(SB), R1  // **argv
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Feb 12 21:41:30 UTC 2018
    - 843 bytes
    - Viewed (0)
  3. src/runtime/race_amd64.s

    	MOVQ	g(R12), R14
    	MOVQ	g_m(R14), R13
    	MOVQ	m_g0(R13), R15
    	CMPQ	R13, R15
    	JEQ	noswitch	// branch if already on g0
    	MOVQ	R15, g(R12)	// g = m->g0
    	MOVQ	R15, R14	// set g register
    	PUSHQ	RARG1	// func arg
    	PUSHQ	RARG0	// func arg
    	CALL	runtime·racecallback(SB)
    	POPQ	R12
    	POPQ	R12
    	// All registers are smashed after Go code, reload.
    	get_tls(R12)
    	MOVQ	g(R12), R13
    	MOVQ	g_m(R13), R13
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 17 18:37:29 UTC 2024
    - 15.1K bytes
    - Viewed (0)
  4. src/runtime/defs_plan9_amd64.go

    	print("sp    ", hex(u.sp), "\n")
    	print("r8    ", hex(u.r8), "\n")
    	print("r9    ", hex(u.r9), "\n")
    	print("r10   ", hex(u.r10), "\n")
    	print("r11   ", hex(u.r11), "\n")
    	print("r12   ", hex(u.r12), "\n")
    	print("r13   ", hex(u.r13), "\n")
    	print("r14   ", hex(u.r14), "\n")
    	print("r15   ", hex(u.r15), "\n")
    	print("ip    ", hex(u.ip), "\n")
    	print("flags ", hex(u.flags), "\n")
    	print("cs    ", hex(u.cs), "\n")
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 21 22:12:04 UTC 2021
    - 1.8K bytes
    - Viewed (0)
  5. src/cmd/cgo/internal/test/issue9400/asm_arm.s

    	// will clobber the test pattern created by the caller
    	ADD	$(1024 * 8), R13
    
    	// Ask signaller to setgid
    	MOVW	$·Baton(SB), R2
    storeloop:
    	MOVW	0(R2), R0
    	MOVW	$1, R1
    	BL	cas<>(SB)
    	BCC	storeloop
    
    	// Wait for setgid completion
    loop:
    	MOVW	$0, R0
    	MOVW	$0, R1
    	BL	cas<>(SB)
    	BCC	loop
    
    	// Restore stack
    	SUB	$(1024 * 8), R13
    
    	MOVW	R4, R14
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 12 12:00:02 UTC 2023
    - 758 bytes
    - Viewed (0)
  6. src/runtime/mkpreempt.go

    	}
    	// Add flag register.
    	l.addSpecial(
    		"MOVW CPSR, R0\nMOVW R0, %d(R13)",
    		"MOVW %d(R13), R0\nMOVW R0, CPSR",
    		4)
    
    	// Add floating point registers F0-F15 and flag register.
    	var lfp = layout{stack: l.stack, sp: "R13"}
    	lfp.addSpecial(
    		"MOVW FPCR, R0\nMOVW R0, %d(R13)",
    		"MOVW %d(R13), R0\nMOVW R0, FPCR",
    		4)
    	for i := 0; i <= 15; i++ {
    		reg := fmt.Sprintf("F%d", i)
    		lfp.add("MOVD", reg, 8)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Nov 20 17:19:36 UTC 2023
    - 15.3K bytes
    - Viewed (0)
  7. src/runtime/defs_windows_amd64.go

    	print("r8      ", hex(r.r8), "\n")
    	print("r9      ", hex(r.r9), "\n")
    	print("r10     ", hex(r.r10), "\n")
    	print("r11     ", hex(r.r11), "\n")
    	print("r12     ", hex(r.r12), "\n")
    	print("r13     ", hex(r.r13), "\n")
    	print("r14     ", hex(r.r14), "\n")
    	print("r15     ", hex(r.r15), "\n")
    	print("rip     ", hex(r.rip), "\n")
    	print("rflags  ", hex(r.eflags), "\n")
    	print("cs      ", hex(r.segcs), "\n")
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 05 08:26:52 UTC 2023
    - 3.2K bytes
    - Viewed (0)
  8. test/codegen/clobberdeadreg.go

    	// amd64:`MOVQ\t\$-2401018187971961171, R11`, `MOVQ\t\$-2401018187971961171, R12`, `MOVQ\t\$-2401018187971961171, R13`
    	// amd64:-`MOVQ\t\$-2401018187971961171, BP` // frame pointer is not clobbered
    	StackArgsCall([10]int{a, b, c})
    	// amd64:`MOVQ\t\$-2401018187971961171, R12`, `MOVQ\t\$-2401018187971961171, R13`, `MOVQ\t\$-2401018187971961171, DX`
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:25 UTC 2023
    - 1.3K bytes
    - Viewed (0)
  9. src/runtime/cgo/gcc_amd64.S

    EXT(crosscall1):
    	pushq %rbx
    	pushq %rbp
    	pushq %r12
    	pushq %r13
    	pushq %r14
    	pushq %r15
    
    #if defined(_WIN64)
    	movq %r8, %rdi	/* arg of setg_gcc */
    	call *%rdx	/* setg_gcc */
    	call *%rcx	/* fn */
    #else
    	movq %rdi, %rbx
    	movq %rdx, %rdi	/* arg of setg_gcc */
    	call *%rsi	/* setg_gcc */
    	call *%rbx	/* fn */
    #endif
    
    	popq %r15
    	popq %r14
    	popq %r13
    	popq %r12
    	popq %rbp
    	popq %rbx
    	ret
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat Aug 12 03:56:28 UTC 2023
    - 1.1K bytes
    - Viewed (0)
  10. src/runtime/cgo/gcc_s390x.S

    .file "gcc_s390x.S"
    
    /*
     * void crosscall_s390x(void (*fn)(void), void *g)
     *
     * Calling into the go tool chain, where all registers are caller save.
     * Called from standard s390x C ABI, where r6-r13, r15, and f8-f15 are
     * callee-save, so they must be saved explicitly.
     */
    .globl crosscall_s390x
    crosscall_s390x:
    	/* save r6-r15 in the register save area of the calling function */
    	stmg    %r6, %r15, 48(%r15)
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Dec 05 16:41:48 UTC 2022
    - 1.4K bytes
    - Viewed (0)
Back to top