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Results 11 - 19 of 19 for MOVW (0.04 sec)
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src/cmd/asm/internal/asm/testdata/armv6.s
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Oct 23 15:18:14 UTC 2024 - 4.7K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/loong64enc1.s
JMP foo(SB) // 00000050 JMP (R4) // 8000004c JMP 1(PC) // 00040050 MOVW $65536, R4 // 04020014 MOVW $4096, R4 // 24000014 MOVV $65536, R4 // 04020014 MOVB R4, R5 // 855c0000 MOVH R4, R5 // 85580000 MOVV $4096, R4 // 24000014 MOVW R4, R5 // 85001700 MOVWU R4, R5 // 8500df00 MOVV R4, R5 // 85001500 MOVBU R4, R5 // 85fc4303 SUB R4, R5, R6 // a6101100
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Thu Sep 04 19:24:25 UTC 2025 - 35.5K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64enc.s
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Mon Jul 24 01:11:41 UTC 2023 - 43.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/riscv64error.s
MOV $8(SP), (X5) // ERROR "address load must target register" MOVB $8(SP), X5 // ERROR "unsupported address load" MOVH $8(SP), X5 // ERROR "unsupported address load" MOVW $8(SP), X5 // ERROR "unsupported address load" MOVF $8(SP), X5 // ERROR "unsupported address load" MOV $1234, 0(SP) // ERROR "constant load must target register"
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Thu May 08 08:53:43 UTC 2025 - 24.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/riscv64.s
MOVH (X5), X6 // 03930200 MOVH 4(X5), X6 // 03934200 MOVW (X5), X6 // 03a30200 MOVW 4(X5), X6 // 03a34200 MOV X5, (X6) // 23305300 MOV X5, 4(X6) // 23325300 MOVB X5, (X6) // 23005300 MOVB X5, 4(X6) // 23025300 MOVH X5, (X6) // 23105300 MOVH X5, 4(X6) // 23125300 MOVW X5, (X6) // 23205300 MOVW X5, 4(X6) // 23225300
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed May 21 14:19:19 UTC 2025 - 49.1K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64enc.s
//TODO: MOVW DS, (R11) // 66418c1b or 498c1b //TODO: MOVW SS, DX // 668cd2 or 488cd2 //TODO: MOVW DS, DX // 668cda or 488cda //TODO: MOVW SS, R11 // 66418cd3 or 498cd3 //TODO: MOVW DS, R11 // 66418cdb or 498cdb MOVW $61731, (BX) // 66c70323f1 MOVW $61731, (R11) // 6641c70323f1
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Fri Oct 08 21:38:44 UTC 2021 - 581.9K bytes - Viewed (1) -
doc/asm.html
</p> <p> Instruction modifiers are appended to the instruction following a period. The only modifiers are <code>P</code> (postincrement) and <code>W</code> (preincrement): <code>MOVW.P</code>, <code>MOVW.W</code> </p> <p> Addressing modes: </p> <ul> <li> <code>R0->16</code> <br> <code>R0>>16</code> <br> <code>R0<<16</code> <br>
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue Nov 28 19:15:27 UTC 2023 - 36.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/asm.go
} func (p *Parser) branch(addr *obj.Addr, target *obj.Prog) { *addr = obj.Addr{ Type: obj.TYPE_BRANCH, Index: 0, } addr.Val = target } // asmInstruction assembles an instruction. // MOVW R9, (R10) func (p *Parser) asmInstruction(op obj.As, cond string, a []obj.Addr) { // fmt.Printf("%s %+v\n", op, a) prog := &obj.Prog{ Ctxt: p.ctxt, Pos: p.pos(), As: op, } switch len(a) {
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue Aug 05 17:31:25 UTC 2025 - 26.2K bytes - Viewed (0) -
lib/fips140/v1.0.0.zip
SHA256ROUND1(63, 0xc67178f2, R9, R10, R11, R12, R13, R14, R15, R8) MOVW (0*4)(R4), REGTMP MOVW (1*4)(R4), REGTMP1 MOVW (2*4)(R4), REGTMP2 MOVW (3*4)(R4), REGTMP3 ADD REGTMP, R8 // H0 = a + H0 ADD REGTMP1, R9 // H1 = b + H1 ADD REGTMP2, R10 // H2 = c + H2 ADD REGTMP3, R11 // H3 = d + H3 MOVW R8, (0*4)(R4) MOVW R9, (1*4)(R4) MOVW R10, (2*4)(R4) MOVW R11, (3*4)(R4) MOVW (4*4)(R4), REGTMP MOVW (5*4)(R4), REGTMP1 MOVW (6*4)(R4), REGTMP2 MOVW (7*4)(R4), REGTMP3 ADD REGTMP, R12 // H4 = e + H4 ADD REGTMP1, R13...
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Jan 29 15:10:35 UTC 2025 - 635K bytes - Viewed (0)