MOVD	m_curg(R6), R5
	CMP		g, R5
	BNE		noswitch

	MOVD	m_g0(R6), R4
	MOVD	(g_sched+gobuf_sp)(R4), R15	// Set SP to g0 stack

noswitch:
	SUB		$16, R15		// reserve 2x 8 bytes for parameters
	MOVD	$~7, R4			// align to 8 bytes because of gcc ABI
	AND		R4, R15
	MOVD	R15, R3			// R15 needs to be in R3 as expected by kernel_clock_gettime

	MOVB	runtime·iscgo(SB),R12
	CMPBNE	R12, $0, nosaveg

TEXT	racecall<>(SB), NOSPLIT, $0-0
	BL	runtime·save_g(SB)		// Save g for callbacks.
	MOVD	R15, R7				// Save SP.
	MOVD	g_m(g), R8			// R8 = thread.
	MOVD	m_g0(R8), R8			// R8 = g0.
	CMPBEQ	R8, g, call			// Already on g0?
	MOVD	(g_sched+gobuf_sp)(R8), R15	// Switch SP to g0.
call:	SUB	$160, R15			// Allocate C frame.
	BL	R1				// Call C code.
	MOVD	R7, R15				// Restore SP.
	RET					// Return to Go.

zero512setup16:
	ANDCC $127, R3, R14 // < 128 byte alignment
	BEQ   zero512setup  // handle 128 byte alignment
	MOVD  $128, R15
	SUB   R14, R15, R14 // find increment to 128 alignment
	SRD   $4, R14, R15  // number of 16 byte chunks
	MOVD   R15, CTR         // loop counter of 16 bytes
	XXLXOR VS32, VS32, VS32 // clear VS32 (V0)

zero512preloop:  // clear up to 128 alignment

	MOVD	24(R4), R20	// x[i+3]
	MOVD	0(R3), R15	// z[i]
	MOVD	8(R3), R17	// z[i+1]
	MOVD	16(R3), R19	// z[i+2]
	MOVD	24(R3), R21	// z[i+3]
	MULLD	R5, R14, R10	// low x[i]*y
	MULHDU	R5, R14, R11	// high x[i]*y
	ADDC	R15, R10
	ADDZE	R11
	ADDC	R9, R10
	ADDZE	R11, R9
	MULLD	R5, R16, R14	// low x[i+1]*y
	MULHDU	R5, R16, R15	// high x[i+1]*y
	ADDC	R17, R14
	ADDZE	R15
	ADDC	R9, R14
	ADDZE	R15, R9

MOVQ name(SB), AX -> NOP; MOVQ name@GOT(SB), R15; MOVQ (R15), AX
MOVQ name+10(SB), AX -> NOP; MOVQ name@GOT(SB), R15; MOVQ 10(R15), AX

CMPQ name(SB), $0 -> NOP; MOVQ name@GOT(SB), R15; CMPQ (R15), $0

MOVQ $1, name(SB) -> NOP; MOVQ name@GOT(SB), R15; MOVQ $1, (R15)
MOVQ $1, name+10(SB) -> NOP; MOVQ name@GOT(SB), R15; MOVQ $1, 10(R15)
`

type ParsedTestData struct {
	input              string

	MOVD	(R15), R1             // e310f0000004
	MOVW	(R15), R2             // e320f0000014
	MOVH	(R15), R3             // e330f0000015
	MOVB	(R15), R4             // e340f0000077
	MOVWZ	(R15), R5             // e350f0000016
	MOVHZ	(R15), R6             // e360f0000091
	MOVBZ	(R15), R7             // e370f0000090
	MOVDBR	(R15), R8             // e380f000000f
	MOVWBR	(R15), R9             // e390f000001e

	VGATHERDPD 360(R15)(Y30*2), K6, Z20 // 6282fd469264772d
	VGATHERDPD 640(R15)(Y20*2), K6, Z10 // 6252fd4692546750
	VGATHERDPD 960(R15)(Y10*2), K6, Z20 // 6282fd4e92645778
	VGATHERDPD 1280(R15)(Y0*2), K6, Z10 // 6252fd4e92944700050000
	VGATHERDPS 360(R15)(X30*2), K6, X20 // 62827d069264775a
	VGATHERDPS 640(R15)(X20*2), K6, X10 // 62527d0692946780020000
	VGATHERDPS 960(R15)(X10*2), K6, X20 // 62827d0e92a457c0030000

	SHA256ROUND0(6, 0x923f82a4, R10, R11, R12, R13, R14, R15, R8, R9)
	SHA256ROUND0(7, 0xab1c5ed5, R9, R10, R11, R12, R13, R14, R15, R8)
	SHA256ROUND0(8, 0xd807aa98, R8, R9, R10, R11, R12, R13, R14, R15)
	SHA256ROUND0(9, 0x12835b01, R15, R8, R9, R10, R11, R12, R13, R14)
	SHA256ROUND0(10, 0x243185be, R14, R15, R8, R9, R10, R11, R12, R13)
	SHA256ROUND0(11, 0x550c7dc3, R13, R14, R15, R8, R9, R10, R11, R12)

	MOVD	$16, R14	// index for VSX loads and stores
	MOVD	$32, R15
	MOVD	$48, R16
	ANDCC	$0x3F, R5, R5	// len%64==0?

	PCALIGN $16
loop64:
	LXVD2X	(R8+R0), V0
	LXVD2X	(R4+R0), V1
	VCMPEQUBCC V0, V1, V2	// compare, setting CR6
	BGELR_CR6
	LXVD2X	(R8+R14), V0
	LXVD2X	(R4+R14), V1
	VCMPEQUBCC	V0, V1, V2
	BGELR_CR6
	LXVD2X	(R8+R15), V0
	LXVD2X	(R4+R15), V1
	VCMPEQUBCC	V0, V1, V2
	BGELR_CR6
	LXVD2X	(R8+R16), V0

	// since its faster on POWER
repeat:
	MOVD    (R6)(R14), R15  // Copy 8 bytes at a time
	MOVD    R15, (R3)(R14)
	ADD     $8, R14
	CMP     R14, R7         // More 8 bytes left?
	BLT     repeat
	BR      done
backward:
	ADD     $-8,R7, R14
repeatback:
	MOVD    (R6)(R14), R15  // copy x into z backwards
	MOVD    R15, (R3)(R14)  // copy 8 bytes at a time
	SUB     $8, R14