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Results 11 - 20 of 33 for gobuf_bp (0.15 sec)
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src/runtime/asm_386.s
MOVL 4(SP), DI // f's caller's PC MOVL DI, (m_morebuf+gobuf_pc)(BX) LEAL 8(SP), CX // f's caller's SP MOVL CX, (m_morebuf+gobuf_sp)(BX) get_tls(CX) MOVL g(CX), SI MOVL SI, (m_morebuf+gobuf_g)(BX) // Call newstack on m->g0's stack. MOVL m_g0(BX), BP MOVL BP, g(CX) MOVL (g_sched+gobuf_sp)(BP), AX MOVL -4(AX), BX // fault if CALL would, before smashing SP MOVL AX, SP
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 15 15:45:13 UTC 2024 - 43.1K bytes - Viewed (0) -
src/runtime/libfuzzer_amd64.s
MOVQ g(R12), R14 MOVQ g_m(R14), R13 // Switch to g0 stack. MOVQ SP, R12 // callee-saved, preserved across the CALL MOVQ m_g0(R13), R10 CMPQ R10, R14 JE call // already on g0 MOVQ (g_sched+gobuf_sp)(R10), SP call: ANDQ $~15, SP // alignment for gcc ABI CALL AX MOVQ R12, SP RET // void runtime·libfuzzerCallTraceIntCmp(fn, arg0, arg1, fakePC uintptr)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 10 04:57:07 UTC 2023 - 5K bytes - Viewed (0) -
src/runtime/msan_loong64.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Jan 09 01:36:54 UTC 2024 - 2K bytes - Viewed (0) -
src/runtime/asan_arm64.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 22 02:20:04 UTC 2023 - 2.1K bytes - Viewed (0) -
src/runtime/asan_loong64.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 22 02:20:04 UTC 2023 - 2.1K bytes - Viewed (0) -
src/runtime/msan_arm64.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Jan 09 01:36:54 UTC 2024 - 2K bytes - Viewed (0) -
src/runtime/asan_amd64.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 22 02:20:04 UTC 2023 - 2.4K bytes - Viewed (0) -
src/runtime/asan_ppc64le.s
MOVD 0(R10), g MOVD g_m(g), R7 // m for g MOVD R1, R16 // callee-saved, preserved across C call MOVD m_g0(R7), R10 // g0 for m CMP R10, g // same g0? BEQ call // already on g0 MOVD (g_sched+gobuf_sp)(R10), R1 // switch R1 call: // prepare frame for C ABI SUB $32, R1 // create frame for callee saving LR, CR, R2 etc. RLDCR $0, R1, $~15, R1 // align SP to 16 bytes MOVD FARG, CTR // address of function to be called
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 26 18:13:33 UTC 2022 - 2.8K bytes - Viewed (0) -
src/runtime/msan_amd64.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Jan 09 01:36:54 UTC 2024 - 2.3K bytes - Viewed (0) -
src/runtime/sys_linux_mips64x.s
MOVV $ret-8(FP), R2 // caller's SP MOVV R31, m_vdsoPC(R17) MOVV R2, m_vdsoSP(R17) MOVV m_curg(R17), R4 MOVV g, R5 BNE R4, R5, noswitch MOVV m_g0(R17), R4 MOVV (g_sched+gobuf_sp)(R4), R1 // Set SP to g0 stack noswitch: SUBV $16, R1 AND $~15, R1 // Align for C code MOVV R1, R29 MOVW $0, R4 // CLOCK_REALTIME MOVV $0(R29), R5
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Oct 18 20:57:24 UTC 2022 - 12K bytes - Viewed (0)