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  1. doc/next/6-stdlib/99-minor/database/sql/64707.md

    Errors returned by [driver.Valuer] implementations are now wrapped for
    improved error handling during operations like [DB.Query], [DB.Exec],
    Plain Text
    - Registered: Tue May 07 11:14:38 GMT 2024
    - Last Modified: Fri Apr 12 20:57:18 GMT 2024
    - 160 bytes
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  2. src/archive/tar/tar_test.go

    	"strings"
    	"testing"
    	"time"
    )
    
    type testError struct{ error }
    
    type fileOps []any // []T where T is (string | int64)
    
    // testFile is an io.ReadWriteSeeker where the IO operations performed
    // on it must match the list of operations in ops.
    type testFile struct {
    	ops fileOps
    	pos int64
    }
    
    func (f *testFile) Read(b []byte) (int, error) {
    	if len(b) == 0 {
    		return 0, nil
    	}
    	if len(f.ops) == 0 {
    Go
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Mar 15 16:01:50 GMT 2024
    - 24K bytes
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  3. src/cmd/asm/internal/asm/testdata/mips.s

    	//	}
    	MOVW	R1, M1
    	MOVW	R1, M1
    
    	//	LMOVW mreg ',' rreg
    	//	{
    	//		outcode(int($1), &$2, 0, &$4);
    	//	}
    	MOVW	M1, R1
    	MOVW	M1, R1
    
    
    	//
    	// integer operations
    	// logical instructions
    	// shift instructions
    	// unary instructions
    	//
    	//	LADDW rreg ',' sreg ',' rreg
    	//	{
    	//		outcode(int($1), &$2, int($4), &$6);
    	//	}
    	ADD	R1, R2, R3
    
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Tue Aug 08 12:17:12 GMT 2023
    - 6.7K bytes
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  4. src/cmd/asm/internal/arch/arm64.go

    		}
    	}
    	return 0, false
    }
    
    // ARM64RegisterShift constructs an ARM64 register with shift operation.
    func ARM64RegisterShift(reg, op, count int16) (int64, error) {
    	// the base register of shift operations must be general register.
    	if reg > arm64.REG_R31 || reg < arm64.REG_R0 {
    		return 0, errors.New("invalid register for shift operation")
    	}
    	return int64(reg&31)<<16 | int64(op)<<22 | int64(uint16(count)), nil
    }
    
    Go
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Thu Sep 29 09:04:58 GMT 2022
    - 10.4K bytes
    - Viewed (0)
  5. src/archive/tar/writer_test.go

    						t.Errorf("test %d, ReadFrom() = (%d, %v), want (%d, %v)", i, got, err, tf.wantCnt, tf.wantErr)
    					}
    					if len(f.ops) > 0 {
    						t.Errorf("test %d, expected %d more operations", i, len(f.ops))
    					}
    				case testClose:
    					err := tw.Close()
    					if !equalError(err, tf.wantErr) {
    						t.Fatalf("test %d, Close() = %v, want %v", i, err, tf.wantErr)
    					}
    				default:
    Go
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Tue Feb 27 16:39:23 GMT 2024
    - 38.7K bytes
    - Viewed (0)
  6. src/archive/zip/writer.go

    			if !utf8.ValidRune(r) || (r == utf8.RuneError && size == 1) {
    				return false, false
    			}
    			require = true
    		}
    	}
    	return true, require
    }
    
    // prepare performs the bookkeeping operations required at the start of
    // CreateHeader and CreateRaw.
    func (w *Writer) prepare(fh *FileHeader) error {
    	if w.last != nil && !w.last.closed {
    		if err := w.last.close(); err != nil {
    			return err
    		}
    	}
    Go
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Thu Apr 04 14:28:57 GMT 2024
    - 19.3K bytes
    - Viewed (0)
  7. src/bufio/bufio.go

    //
    // UnreadByte returns an error if the most recent method called on the
    // [Reader] was not a read operation. Notably, [Reader.Peek], [Reader.Discard], and [Reader.WriteTo] are not
    // considered read operations.
    func (b *Reader) UnreadByte() error {
    	if b.lastByte < 0 || b.r == 0 && b.w > 0 {
    		return ErrInvalidUnreadByte
    	}
    	// b.r > 0 || b.w == 0
    	if b.r > 0 {
    		b.r--
    	} else {
    		// b.r == 0 && b.w == 0
    Go
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Thu Oct 12 14:39:08 GMT 2023
    - 21.8K bytes
    - Viewed (0)
  8. src/cmd/asm/internal/asm/testdata/riscv64.s

    	// 5.3: Load and Store Instructions (RV64I)
    	LD	(X5), X6				// 03b30200
    	LD	4(X5), X6				// 03b34200
    	SD	X5, (X6)				// 23305300
    	SD	X5, 4(X6)				// 23325300
    
    	// 7.1: Multiplication Operations
    	MUL	X5, X6, X7				// b3035302
    	MULH	X5, X6, X7				// b3135302
    	MULHU	X5, X6, X7				// b3335302
    	MULHSU	X5, X6, X7				// b3235302
    	MULW	X5, X6, X7				// bb035302
    	DIV	X5, X6, X7				// b3435302
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Mar 22 04:42:21 GMT 2024
    - 16.7K bytes
    - Viewed (1)
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