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Results 11 - 20 of 24 for fdiv (0.21 sec)

  1. src/cmd/internal/obj/x86/anames.go

    	"FCOMDPP",
    	"FCOMF",
    	"FCOMFP",
    	"FCOMI",
    	"FCOMIP",
    	"FCOML",
    	"FCOMLP",
    	"FCOMW",
    	"FCOMWP",
    	"FCOS",
    	"FDECSTP",
    	"FDIVD",
    	"FDIVDP",
    	"FDIVF",
    	"FDIVL",
    	"FDIVRD",
    	"FDIVRDP",
    	"FDIVRF",
    	"FDIVRL",
    	"FDIVRW",
    	"FDIVW",
    	"FFREE",
    	"FINCSTP",
    	"FINIT",
    	"FLD1",
    	"FLDCW",
    	"FLDENV",
    	"FLDL2E",
    	"FLDL2T",
    	"FLDLG2",
    	"FLDLN2",
    	"FLDPI",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 11 18:32:50 UTC 2023
    - 19.1K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/RISCV64Ops.go

    		{name: "FMULS", argLength: 2, reg: fp21, asm: "FMULS", commutative: true, typ: "Float32"},                                           // arg0 * arg1
    		{name: "FDIVS", argLength: 2, reg: fp21, asm: "FDIVS", commutative: false, typ: "Float32"},                                          // arg0 / arg1
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 07 14:57:07 UTC 2024
    - 30.7K bytes
    - Viewed (0)
  3. src/cmd/internal/obj/arm/obj5.go

    	cursym.Func().Args = p.To.Val.(int32)
    
    	/*
    	 * find leaf subroutines
    	 */
    	for p := cursym.Func().Text; p != nil; p = p.Link {
    		switch p.As {
    		case obj.ATEXT:
    			p.Mark |= LEAF
    
    		case ADIV, ADIVU, AMOD, AMODU:
    			cursym.Func().Text.Mark &^= LEAF
    
    		case ABL,
    			ABX,
    			obj.ADUFFZERO,
    			obj.ADUFFCOPY:
    			cursym.Func().Text.Mark &^= LEAF
    		}
    	}
    
    	var q2 *obj.Prog
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Nov 20 17:19:36 UTC 2023
    - 21.4K bytes
    - Viewed (0)
  4. src/cmd/internal/obj/s390x/a.out.go

    	AROSBGT
    	ARISBG
    	ARISBGN
    	ARISBGZ
    	ARISBGNZ
    	ARISBHG
    	ARISBLG
    	ARISBHGZ
    	ARISBLGZ
    
    	// floating point
    	AFABS
    	AFADD
    	AFADDS
    	AFCMPO
    	AFCMPU
    	ACEBR
    	AFDIV
    	AFDIVS
    	AFMADD
    	AFMADDS
    	AFMOVD
    	AFMOVS
    	AFMSUB
    	AFMSUBS
    	AFMUL
    	AFMULS
    	AFNABS
    	AFNEG
    	AFNEGS
    	ALEDBR
    	ALDEBR
    	ALPDFR
    	ALNDFR
    	AFSUB
    	AFSUBS
    	AFSQRT
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Sep 05 16:41:03 UTC 2023
    - 12.4K bytes
    - Viewed (0)
  5. src/cmd/internal/obj/riscv/cpu.go

    	AADDW
    	ASLLW
    	ASRLW
    	ASUBW
    	ASRAW
    
    	// 5.3: Load and Store Instructions (RV64I)
    	ALD
    	ASD
    
    	// 7.1: Multiplication Operations
    	AMUL
    	AMULH
    	AMULHU
    	AMULHSU
    	AMULW
    	ADIV
    	ADIVU
    	AREM
    	AREMU
    	ADIVW
    	ADIVUW
    	AREMW
    	AREMUW
    
    	// 8.2: Load-Reserved/Store-Conditional Instructions
    	ALRD
    	ASCD
    	ALRW
    	ASCW
    
    	// 8.3: Atomic Memory Operations
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 20 14:19:33 UTC 2024
    - 13.1K bytes
    - Viewed (0)
  6. src/cmd/internal/obj/ppc64/a.out.go

    	AEQV
    	AEQVCC
    	AEXTSB
    	AEXTSBCC
    	AEXTSH
    	AEXTSHCC
    	AFABS
    	AFABSCC
    	AFADD
    	AFADDCC
    	AFADDS
    	AFADDSCC
    	AFCMPO
    	AFCMPU
    	AFCTIW
    	AFCTIWCC
    	AFCTIWZ
    	AFCTIWZCC
    	AFDIV
    	AFDIVCC
    	AFDIVS
    	AFDIVSCC
    	AFMADD
    	AFMADDCC
    	AFMADDS
    	AFMADDSCC
    	AFMOVD
    	AFMOVDCC
    	AFMOVDU
    	AFMOVS
    	AFMOVSU
    	AFMOVSX
    	AFMOVSZ
    	AFMSUB
    	AFMSUBCC
    	AFMSUBS
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 01 18:50:29 UTC 2024
    - 16K bytes
    - Viewed (0)
  7. src/cmd/asm/internal/asm/testdata/riscv64.s

    	FSW	F0, 4(X5)				// 27a20200
    
    	// 11.6: Single-Precision Floating-Point Computational Instructions
    	FADDS	F1, F0, F2				// 53011000
    	FSUBS	F1, F0, F2				// 53011008
    	FMULS	F1, F0, F2				// 53011010
    	FDIVS	F1, F0, F2				// 53011018
    	FMINS	F1, F0, F2				// 53011028
    	FMAXS	F1, F0, F2				// 53111028
    	FSQRTS	F0, F1					// d3000058
    
    	// 11.7: Single-Precision Floating-Point Conversion and Move Instructions
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Mar 22 04:42:21 UTC 2024
    - 16.7K bytes
    - Viewed (0)
  8. src/cmd/internal/obj/riscv/inst.go

    		return &inst{0x73, 0x1, 0x0, 0, 0x0}
    	case ACSRRWI:
    		return &inst{0x73, 0x5, 0x0, 0, 0x0}
    	case ACTZ:
    		return &inst{0x13, 0x1, 0x1, 1537, 0x30}
    	case ACTZW:
    		return &inst{0x1b, 0x1, 0x1, 1537, 0x30}
    	case ADIV:
    		return &inst{0x33, 0x4, 0x0, 32, 0x1}
    	case ADIVU:
    		return &inst{0x33, 0x5, 0x0, 32, 0x1}
    	case ADIVUW:
    		return &inst{0x3b, 0x5, 0x0, 32, 0x1}
    	case ADIVW:
    		return &inst{0x3b, 0x4, 0x0, 32, 0x1}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 20 14:19:33 UTC 2024
    - 13.9K bytes
    - Viewed (0)
  9. test/codegen/mathbits.go

    	// riscv64:"MUL\t",-"MULHU"
    	_, lo := bits.Mul64(x, y)
    	return lo
    }
    
    // --------------- //
    //    bits.Div*    //
    // --------------- //
    
    func Div(hi, lo, x uint) (q, r uint) {
    	// amd64:"DIVQ"
    	return bits.Div(hi, lo, x)
    }
    
    func Div32(hi, lo, x uint32) (q, r uint32) {
    	// arm64:"ORR","UDIV","MSUB",-"UREM"
    	return bits.Div32(hi, lo, x)
    }
    
    func Div64(hi, lo, x uint64) (q, r uint64) {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 18:51:17 UTC 2024
    - 19.6K bytes
    - Viewed (0)
  10. src/cmd/compile/internal/walk/assign.go

    			return false
    		}
    		return n.Addrtaken() || !n.OnStack()
    
    	case ir.OADD,
    		ir.OAND,
    		ir.OANDAND,
    		ir.OANDNOT,
    		ir.OBITNOT,
    		ir.OCONV,
    		ir.OCONVIFACE,
    		ir.OCONVNOP,
    		ir.ODIV,
    		ir.ODOT,
    		ir.ODOTTYPE,
    		ir.OLITERAL,
    		ir.OLSH,
    		ir.OMOD,
    		ir.OMUL,
    		ir.ONEG,
    		ir.ONIL,
    		ir.OOR,
    		ir.OOROR,
    		ir.OPAREN,
    		ir.OPLUS,
    		ir.ORSH,
    		ir.OSUB,
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 08 17:09:06 UTC 2024
    - 20.3K bytes
    - Viewed (0)
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