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doc/go1.17_spec.html
</p> <pre> func (p *Point) Length() float64 { return math.Sqrt(p.x * p.x + p.y * p.y) } func (p *Point) Scale(factor float64) { p.x *= factor p.y *= factor } </pre> <p> bind the methods <code>Length</code> and <code>Scale</code>, with receiver type <code>*Point</code>, to the base type <code>Point</code>. </p> <p>
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src/cmd/asm/internal/asm/parse.go
p.errorf("%s doesn't support scaled register format", p.arch.Name) } else { a.Scale = int16(scale) } } p.get(')') } else if scale != 0 { if p.arch.Family == sys.ARM64 { p.errorf("arm64 doesn't support scaled register format") } // First (R) was missing, all we have is (R*scale). a.Reg = 0 a.Index = r1 a.Scale = int16(scale) } }
Go - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Wed Feb 21 14:34:57 GMT 2024 - 36.9K bytes - Viewed (0) -
doc/asm.html
to a <code>NOP</code> instruction). </p> <p> Addressing modes: </p> <ul> <li> <code>(R5)(R6*1)</code>: The location at <code>R5</code> plus <code>R6</code>. It is a scaled mode as on the x86, but the only scale allowed is <code>1</code>. </li> </ul> <h3 id="mips">MIPS, MIPS64</h3> <p> General purpose registers are named <code>R0</code> through <code>R31</code>,
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src/cmd/asm/internal/asm/testdata/amd64error.s
EXTRACTPS $4, X2, (BX) // ERROR "invalid instruction" EXTRACTPS $-1, X2, (BX) // ERROR "invalid instruction" // VSIB addressing does not permit non-vector (X/Y) // scaled index register. VPGATHERDQ X12,(R13)(AX*2), X11 // ERROR "invalid instruction" VPGATHERDQ X2, 664(BX*1), X1 // ERROR "invalid instruction" VPGATHERDQ Y2, (BP)(AX*2), Y1 // ERROR "invalid instruction"
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doc/go_spec.html
</p> <pre> func (p *Point) Length() float64 { return math.Sqrt(p.x * p.x + p.y * p.y) } func (p *Point) Scale(factor float64) { p.x *= factor p.y *= factor } </pre> <p> bind the methods <code>Length</code> and <code>Scale</code>, with receiver type <code>*Point</code>, to the base type <code>Point</code>. </p> <p>
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