}
	})

	t.Run("int32", func(t *testing.T) {
		var sink bytes.Buffer
		enc := NewEncoder(&sink)
		enc.Encode(s32)

		dec := NewDecoder(&sink)
		res := make([]int32, 9)
		dec.Decode(&res)

		if !reflect.DeepEqual(s32, res) {
			t.Fatalf("EncodeIntSlice: expected %v, got %v", s32, res)
		}
	})

	t.Run("int64", func(t *testing.T) {
		var sink bytes.Buffer
		enc := NewEncoder(&sink)

//
// This function's execution time does not depend on the inputs.
func Add(x, y, carry uint) (sum, carryOut uint) {
	if UintSize == 32 {
		s32, c32 := Add32(uint32(x), uint32(y), uint32(carry))
		return uint(s32), uint(c32)
	}
	s64, c64 := Add64(uint64(x), uint64(y), uint64(carry))
	return uint(s64), uint(c64)
}

// Add32 returns the sum with carry of x, y and carry: sum = x + y + carry.

	for _, fp := range fpInst {
		if inst.Op&^15 == fp.op {
			// remove gnu syntax suffixes
			op = strings.Replace(op, ".F32", "", -1)
			op = strings.Replace(op, ".F64", "", -1)
			op = strings.Replace(op, ".S32", "", -1)
			op = strings.Replace(op, ".U32", "", -1)
			op = strings.Replace(op, ".32", "", -1)
			// compose op name
			if fp.op == VLDR_EQ || fp.op == VSTR_EQ {
				switch {

      ConfigProto::Experimental::MLIR_BRIDGE_ROLLOUT_UNSPECIFIED);

  ASSERT_TRUE(compilation_result.ok());
  EXPECT_THAT(compilation_result,
              ComputationProtoContains("element_type:.S32\n.*dimensions: 3"));
}

}  // namespace v2
}  // namespace tf2xla

      absl::Span<const int64_t> dims, int32_t min = -128, int32_t max = 127) {
    TF_ASSIGN_OR_RETURN(auto shape,
                        xla::ShapeUtil::MakeValidatedShape(xla::S32, dims));
    return xla::LiteralUtil::CreateLiteralWithGenerator<xla::S32, int32_t>(
        shape, [this, min, max](absl::Span<const int64_t> dims) -> int32_t {
          return absl::Uniform(bitgen_, min, max);
        });
  }

//		csor(3) algorithms(4) id-dsa-with-sha2(3) 2}
//
// RFC 5758 3.2 ECDSA Signature Algorithm
//
//	ecdsa-with-SHA256 OBJECT IDENTIFIER ::= { iso(1) member-body(2)
//		us(840) ansi-X9-62(10045) signatures(4) ecdsa-with-SHA2(3) 2 }
//
//	ecdsa-with-SHA384 OBJECT IDENTIFIER ::= { iso(1) member-body(2)
//		us(840) ansi-X9-62(10045) signatures(4) ecdsa-with-SHA2(3) 3 }
//

	// adrp followed by a LD16 or ST16 instruction.
	R_ARM64_PCREL_LDST16

	// R_ARM64_PCREL_LDST32 resolves a PC-relative addresses instruction sequence, usually an
	// adrp followed by a LD32 or ST32 instruction.
	R_ARM64_PCREL_LDST32

	// R_ARM64_PCREL_LDST64 resolves a PC-relative addresses instruction sequence, usually an
	// adrp followed by a LD64 or ST64 instruction.
	R_ARM64_PCREL_LDST64

// produces randomized signatures.
func mixedCSPRNG(rand io.Reader, priv *PrivateKey, hash []byte) (io.Reader, error) {
	// This implementation derives the nonce from an AES-CTR CSPRNG keyed by:
	//
	//    SHA2-512(priv.D || entropy || hash)[:32]
	//
	// The CSPRNG key is indifferentiable from a random oracle as shown in
	// [Coron], the AES-CTR stream is indifferentiable from a random oracle

    case xla::PRED:
      *str = "bool";
      break;
    case xla::S8:
      *str = "tensorflow::int8";
      break;
    case xla::S16:
      *str = "tensorflow::int16";
      break;
    case xla::S32:
      *str = "tensorflow::int32";
      break;
    case xla::S64:
      *str = "int64_t";
      break;
    case xla::U8:
      *str = "tensorflow::uint8";
      break;
    case xla::U16:

		// If prefixed instructions are supported, a 34b signed constant can be generated by one pli instruction.
		isS34 := pfxEnabled && (p.From.Offset<<30)>>30 == p.From.Offset

		// Try converting MOVD $const,Rx into ADDIS/ORIS $s32>>16,R0,Rx
		switch {
		case isS32 && p.From.Offset&0xFFFF == 0 && p.From.Offset != 0:
			p.As = AADDIS
			p.From.Offset >>= 16
			p.Reg = REG_R0

		case isU32 && p.From.Offset&0xFFFF == 0 && p.From.Offset != 0: