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Results 21 - 30 of 212 for Mem (0.04 sec)
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src/cmd/compile/internal/ssa/rewriteAMD64.go
v0.Aux = symToAux(s) v0.AddArg2(p, mem) return true } // match: (BSWAPL x:(MOVBELload [i] {s} p mem)) // cond: x.Uses == 1 // result: @x.Block (MOVLload [i] {s} p mem) for { x := v_0 if x.Op != OpAMD64MOVBELload { break } i := auxIntToInt32(x.AuxInt) s := auxToSym(x.Aux) mem := x.Args[1] p := x.Args[0] if !(x.Uses == 1) { break
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 712.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/386Ops.go
{name: "MOVLstore", argLength: 3, reg: gpstore, asm: "MOVL", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // store 4 bytes in arg1 to arg0+auxint+aux. arg2=mem // direct binary-op on memory (read-modify-write) {name: "ADDLmodify", argLength: 3, reg: gpstore, asm: "ADDL", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, clobberFlags: true, symEffect: "Read,Write"}, // *(arg0+auxint+aux) += arg1, arg2=mem
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 14 08:10:32 UTC 2023 - 45.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM.go
// result: (MOVBstore [c] ptr val mem) for { ptr := v_0 if v_1.Op != OpARMMOVWconst { break } c := auxIntToInt32(v_1.AuxInt) val := v_2 mem := v_3 v.reset(OpARMMOVBstore) v.AuxInt = int32ToAuxInt(c) v.AddArg3(ptr, val, mem) return true } // match: (MOVBstoreidx (MOVWconst [c]) ptr val mem) // result: (MOVBstore [c] ptr val mem) for {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 486.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteMIPS64.go
v.AddArg2(ptr, mem) return true } // match: (Load <t> ptr mem) // cond: (is16BitInt(t) && t.IsSigned()) // result: (MOVHload ptr mem) for { t := v.Type ptr := v_0 mem := v_1 if !(is16BitInt(t) && t.IsSigned()) { break } v.reset(OpMIPS64MOVHload) v.AddArg2(ptr, mem) return true } // match: (Load <t> ptr mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 31 03:59:48 UTC 2023 - 211.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteRISCV64.go
b := v.Block config := b.Func.Config typ := &b.Func.Config.Types // match: (Move [0] _ _ mem) // result: mem for { if auxIntToInt64(v.AuxInt) != 0 { break } mem := v_2 v.copyOf(mem) return true } // match: (Move [1] dst src mem) // result: (MOVBstore dst (MOVBload src mem) mem) for { if auxIntToInt64(v.AuxInt) != 1 { break } dst := v_0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 205.1K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/arm/armasm/plan9x.go
// Check for RET reg, _ := inst.Args[0].(Reg) mem, _ := inst.Args[1].(Mem) if inst.Op&^15 == LDR_EQ && reg == R15 && mem.Base == SP && mem.Sign == 0 && mem.Mode == AddrPostIndex { return fmt.Sprintf("RET%s #%d", op[3:], mem.Offset) } // Check for PC-relative load. if mem.Base == PC && mem.Sign == 0 && mem.Mode == AddrOffset && text != nil { addr := uint32(pc) + 8 + uint32(mem.Offset) buf := make([]byte, 8)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:33 UTC 2023 - 11.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
{name: "SETLEstore", argLength: 3, reg: gpstoreconst, asm: "SETLE", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // extract signed <= condition from arg1 to arg0+auxint+aux, arg2=mem
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 04 16:40:24 UTC 2023 - 98K bytes - Viewed (1) -
src/cmd/compile/internal/ssa/_gen/S390XOps.go
{name: "MOVBstore", argLength: 3, reg: gpstore, asm: "MOVB", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // store byte in arg1 to arg0+auxint+aux. arg2=mem {name: "MOVHstore", argLength: 3, reg: gpstore, asm: "MOVH", aux: "SymOff", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // store 2 bytes in arg1 to arg0+auxint+aux. arg2=mem
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 24 00:21:13 UTC 2023 - 52.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPS64.rules
mem) // moves (Move [0] _ _ mem) => mem (Move [1] dst src mem) => (MOVBstore dst (MOVBload src mem) mem) (Move [2] {t} dst src mem) && t.Alignment()%2 == 0 => (MOVHstore dst (MOVHload src mem) mem) (Move [2] dst src mem) => (MOVBstore [1] dst (MOVBload [1] src mem) (MOVBstore dst (MOVBload src mem) mem)) (Move [4] {t} dst src mem) && t.Alignment()%4 == 0 =>
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 31 03:59:48 UTC 2023 - 41.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteMIPS.go
v.AddArg2(ptr, mem) return true } // match: (Load <t> ptr mem) // cond: (is16BitInt(t) && t.IsSigned()) // result: (MOVHload ptr mem) for { t := v.Type ptr := v_0 mem := v_1 if !(is16BitInt(t) && t.IsSigned()) { break } v.reset(OpMIPSMOVHload) v.AddArg2(ptr, mem) return true } // match: (Load <t> ptr mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 14:43:03 UTC 2023 - 176.6K bytes - Viewed (0)