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Results 21 - 30 of 42 for 2xui16 (0.2 sec)

  1. tensorflow/compiler/mlir/tfr/tests/raise_to_tf.mlir

    }
    
    // CHECK-LABEL: fixed_element_attribute
    func.func @fixed_element_attribute(%arg0: tensor<2xf32>) -> tensor<2xi1> {
      %0 = "tfr.cast"(%arg0) : (tensor<2xf32>) -> !tfr.tensor
      %1 = tfr.call @tf__positive(%0) : (!tfr.tensor) -> !tfr.tensor
      %2 = "tfr.cast"(%1) : (!tfr.tensor) -> tensor<2xi1>
      func.return %2 : tensor<2xi1>
    // CHECK: %[[positive:.*]] = "tf.Positive"(%arg0) : (tensor<2xf32>) -> tensor<*xi1>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 6.7K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/tensorflow/tests/graphdef2mlir/const-values.pbtxt

            tensor_shape {
              dim {
                size: 2
              }
            }
            half_val: 16964
            half_val: 17485
            # CHECK: value = dense<[4.900000e+01, 8.200000e+02]> : tensor<2xbf16>
          }
        }
      }
    }
    node {
      name: "double"
      op: "Const"
      device: "/device:CPU:0"
      attr {
        key: "dtype"
        value {
          type: DT_DOUBLE
        }
      }
      attr {
        key: "value"
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Apr 24 00:20:25 UTC 2020
    - 3.3K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/lite/tests/legalize-tf.mlir

    }
    
    func.func @floor_mod_i16(%arg0: tensor<5xi16>, %arg1: tensor<5xi16>) -> tensor<5xi16> {
      %0 = "tf.FloorMod"(%arg0, %arg1) : (tensor<5xi16>, tensor<5xi16>) -> tensor<5xi16>
      func.return %0 : tensor<5xi16>
      // CHECK-LABEL: floor_mod_i16
      // CHECK: "tfl.floor_mod"(%arg0, %arg1) : (tensor<5xi16>, tensor<5xi16>) -> tensor<5xi16>
    }
    
    func.func @exp(%arg0: tensor<5xf32>) -> tensor<5xf32> {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Jun 05 01:54:33 UTC 2024
    - 153.4K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/tensorflow/tests/mlir2graphdef/shape_list_attr.mlir

    // CHECK:            shape {
    // CHECK-NEXT:         unknown_rank: true
    
    
    func.func @main() {
      tf_executor.graph {
        %0:4 = tf_executor.island wraps "tf.InfeedDequeueTuple"() : () -> (tensor<3xi32>, tensor<4x?xf32>, tensor<*xi16>)
        tf_executor.fetch
      }
      func.return
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Mar 28 12:06:33 UTC 2022
    - 931 bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/tensorflow/tests/tf_device_ops.mlir

      %8 = "tf.opI"() : () -> tensor<*xf32>
      %9 = "tf.opJ"() : () -> tensor<*xi8>
      %10 = "tf.opK"() : () -> tensor<*xi16>
      %11 = "tf.opL"() : () -> tensor<*xi64>
      tf_device.replicate([%0, %1, %2] as %input0: tensor<*xi1>, %9 as %input1: tensor<*xi8>, %10 as %input2: tensor<*xi16>, [%3, %4, %5] as %input3: tensor<*xi32>, [%6, %7, %8] as %input4: tensor<*xf32>, %11 as %input5: tensor<*xi64>) {n = 3 : i32} {
        tf_device.return
      }
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Jan 23 23:53:20 UTC 2024
    - 7.7K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/lite/ir/tfl_ops.td

      let arguments = (ins
         TFL_TensorOf<[I8, I16, I32, I64, UI8, UI16, UI32, UI64, F32, F64]>:$input,
         TFL_TensorOf<[I32]>:$dilations,
         TFL_0DTensorOf<[I8, I16, I32, I64, UI8, UI16, UI32, UI64, F32, F64]>:$padding_value
      );
    
      let results = (outs TFL_TensorOf<[I8, I16, I32, I64, UI8, UI16, UI32, UI64, F32, F64]>:$output);
    }
    
    def TFL_AddOp : TFL_Op<"add", [
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Jun 06 19:09:08 UTC 2024
    - 186K bytes
    - Viewed (0)
  7. src/encoding/xml/read_test.go

        <I16Neg>  -6703  </I16Neg>
        <I32>  266703  </I32>
        <I32Neg>  -266703  </I32Neg>
        <I64>  266703  </I64>
        <I64Neg>  -266703  </I64Neg>
        <UI>   266703   </UI>
        <UI8>  112  </UI8>
        <UI16>  6703  </UI16>
        <UI32>  266703  </UI32>
        <UI64>  266703  </UI64>
        <F32>  266.703  </F32>
        <F32Neg>  -266.703  </F32Neg>
        <F64>  266.703  </F64>
        <F64Neg>  -266.703  </F64Neg>
    </WhitespaceValuesParent>
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 26 19:58:28 UTC 2024
    - 29.1K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/tf2xla/tests/legalize-tf.mlir

    func.func @floordiv_bf16(%arg0: tensor<2xbf16>) -> tensor<2xbf16> {
      // CHECK-NEXT:  mhlo.convert
      // CHECK-NEXT:  mhlo.convert
      // CHECK-NEXT:  chlo.broadcast_divide
      // CHECK-NEXT:  mhlo.floor
      // CHECK-NEXT:  mhlo.convert
      // CHECK-NEXT:  return
      %0 = "tf.FloorDiv"(%arg0, %arg0) : (tensor<2xbf16>, tensor<2xbf16>) -> tensor<2xbf16>
      func.return %0: tensor<2xbf16>
    }
    
    // -----
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon May 06 18:46:23 UTC 2024
    - 335.5K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/quantization/common/quantization_lib/quantization.td

    // operand's tensor types.
    def QI4 : QuantizedType<"Uniform", [4], 1>;
    def QUI8 : QuantizedType<"Uniform", [8], 0>;
    def QI8 : QuantizedType<"Uniform", [8], 1>;
    def QUI16 : QuantizedType<"Uniform", [16], 0>;
    def QI16 : QuantizedType<"Uniform", [16], 1>;
    def QUI32 : QuantizedType<"Uniform", [32], 0>;
    def QI32 : QuantizedType<"Uniform", [32], 1>;
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Mar 05 07:39:40 UTC 2024
    - 8.3K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/tensorflow/tests/constant-fold.mlir

    func.func @testLogicalAndDoesntFoldWithConstantFalseBroadcast(%arg0: tensor<2xi1>) -> (tensor<2xi1>) {
      %cst = arith.constant dense<false> : tensor<i1>
    
      // CHECK: %[[LOGICAL_AND:.*]] = "tf.LogicalAnd"
      %0 = "tf.LogicalAnd"(%cst, %arg0) : (tensor<i1>, tensor<2xi1>) -> tensor<2xi1>
    
      // CHECK: return %[[LOGICAL_AND]]
      func.return %0: tensor<2xi1>
    }
    
    // -----
    
    // GlobalIterId should not be constant folded
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Jan 31 23:22:24 UTC 2024
    - 36.7K bytes
    - Viewed (0)
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