%3 = "tf.opD"() : () -> tensor<*xi32>
  %4 = "tf.opE"() : () -> tensor<*xi32>
  %5 = "tf.opF"() : () -> tensor<*xi32>
  %6 = "tf.opG"() : () -> tensor<*xf32>
  %7 = "tf.opH"() : () -> tensor<*xf32>
  %8 = "tf.opI"() : () -> tensor<*xf32>
  %9 = "tf.opJ"() : () -> tensor<*xi8>
  %10 = "tf.opK"() : () -> tensor<*xi16>
  %11 = "tf.opL"() : () -> tensor<*xi64>

%4 = "tf.opE"() : () -> tensor<!tf_type.resource>
%5 = "tf.opF"() : () -> tensor<!tf_type.resource>
%6 = "tf.opG"() : () -> tensor<!tf_type.string>
%7 = "tf.opH"() : () -> tensor<!tf_type.string>
%8 = "tf.opI"() : () -> tensor<!tf_type.variant>
%9 = "tf.opJ"() : () -> tensor<i1>
%output:8 = tf_device.replicate([%0, %1] as %input_0: tensor<i32>,
                                [%2, %3] as %input_1: tensor<f32>,

		r := int(p.Reg)
		if r == 0 {
			r = int(p.To.Reg)
		}

		o1 = OP_12IRR(c.opirr(p.As), uint32(v), uint32(r), uint32(p.To.Reg))

	case 5: // syscall
		v := c.regoff(&p.From)
		o1 = OP_15I(c.opi(p.As), uint32(v))

	case 6: // beq r1,[r2],sbra
		v := int32(0)
		if p.To.Target() != nil {
			v = int32(p.To.Target().Pc-p.Pc) >> 2
		}
		as, rd, rj, width := p.As, p.Reg, p.From.Reg, 16

// operand. The instruction is specified by as and the source register is
// specified by rs, instead of the obj.Prog.
func instructionsForOpImmediate(p *obj.Prog, as obj.As, rs int16) []*instruction {
	// <opi> $imm, REG, TO
	ins := instructionForProg(p)
	ins.as, ins.rs1, ins.rs2 = as, uint32(rs), obj.REG_NONE

	low, high, err := Split32BitImmediate(ins.imm)
	if err != nil {