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Results 11 - 20 of 44 for dcmpu (0.12 sec)
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src/math/tan_s390x.s
TEXT ·tanAsm(SB), NOSPLIT, $0-16 FMOVD x+0(FP), F0 //special case Tan(±0) = ±0 FMOVD $(0.0), F1 FCMPU F0, F1 BEQ atanIsZero MOVD $·tanrodataL13<>+0(SB), R5 LTDBR F0, F0 BLTU L10 FMOVD F0, F2 L2: MOVD $·tanxlim<>+0(SB), R1 FMOVD 0(R1), F1 FCMPU F2, F1 BGT L9 BVS L11 MOVD $·tanxadd<>+0(SB), R1 FMOVD 88(R5), F6 FMOVD 0(R1), F4 WFMSDB V0, V6, V4, V6
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Jul 27 23:30:00 UTC 2023 - 2.7K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/obj9.go
// guard against underflow. // // CMPU SP, $(framesize-StackSmall) // BLT label-of-call-to-morestack if offset <= 0xffff { p = obj.Appendp(p, c.newprog) p.As = ACMPU p.From.Type = obj.TYPE_REG p.From.Reg = REGSP p.To.Type = obj.TYPE_CONST p.To.Offset = offset } else { // Constant is too big for CMPU. p = obj.Appendp(p, c.newprog) p.As = AMOVD
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 18:17:17 UTC 2024 - 40.8K bytes - Viewed (0) -
src/crypto/subtle/xor_ppc64x.s
TEXT ·xorBytes(SB), NOSPLIT, $0 MOVD dst+0(FP), R3 // R3 = dst MOVD a+8(FP), R4 // R4 = a MOVD b+16(FP), R5 // R5 = b MOVD n+24(FP), R6 // R6 = n CMPU R6, $64, CR7 // Check if n ≥ 64 bytes MOVD R0, R8 // R8 = index CMPU R6, $8, CR6 // Check if 8 ≤ n < 64 bytes BLE CR6, small // <= 8 BLT CR7, xor32 // Case for 32 ≤ n < 64 bytes // Case for n ≥ 64 bytes preloop64:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 18:17:17 UTC 2024 - 2.9K bytes - Viewed (0) -
src/math/sinh_s390x.s
TEXT ·sinhAsm(SB),NOSPLIT,$0-16 FMOVD x+0(FP), F0 //special case Sinh(±0) = ±0 FMOVD $(0.0), F1 FCMPU F0, F1 BEQ sinhIsZero //special case Sinh(±Inf) = ±Inf FMOVD $1.797693134862315708145274237317043567981e+308, F1 FCMPU F1, F0 BLEU sinhIsInf FMOVD $-1.797693134862315708145274237317043567981e+308, F1 FCMPU F1, F0 BGT sinhIsInf MOVD $sinhrodataL21<>+0(SB), R5 LTDBR F0, F0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 17 13:54:10 UTC 2021 - 6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64.rules
(Neq(32|64)F x y) => (NotEqual (FCMPU x y)) (Less(8|16) x y) => (LessThan (CMPW (SignExt(8|16)to32 x) (SignExt(8|16)to32 y))) (Less(32|64) x y) => (LessThan ((CMPW|CMP) x y)) (Less(32|64)F x y) => (FLessThan (FCMPU x y)) (Less(8|16)U x y) => (LessThan (CMPWU (ZeroExt(8|16)to32 x) (ZeroExt(8|16)to32 y))) (Less(32|64)U x y) => (LessThan ((CMPWU|CMPU) x y))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 53.2K bytes - Viewed (0) -
src/vendor/golang.org/x/crypto/chacha20/chacha_ppc64le.s
XXPERMDI VS44, VS46, $3, VS47 XXPERMDI VS61, VS62, $0, VS44 XXPERMDI VS61, VS62, $3, VS46 VADDUWM V0, V16, V0 VADDUWM V4, V17, V4 VADDUWM V8, V18, V8 VADDUWM V12, V19, V12 CMPU LEN, $64 BLT tail_vsx // Bottom of loop LXVW4X (INP)(R0), VS59 LXVW4X (INP)(R8), VS60 LXVW4X (INP)(R9), VS61 LXVW4X (INP)(R10), VS62 VXOR V27, V0, V27 VXOR V28, V4, V28
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 05 22:18:42 UTC 2024 - 9K bytes - Viewed (0) -
src/crypto/aes/asm_ppc64x.s
#ifdef NEEDS_ESPERM MOVD $·rcon(SB), R7 LVX (R7), ESPERM // Permute value for P8_ macros. #endif // Set CR{1,2,3}EQ to hold the key size information. CMPU R6, $10, CR1 CMPU R6, $12, CR2 CMPU R6, $14, CR3 MOVD $16, R6 MOVD $32, R7 MOVD $48, R8 MOVD $64, R9 MOVD $80, R10 MOVD $96, R11 MOVD $112, R12 // Load text in BE order P8_LXVB16X(R4, R0, V0)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 20 18:05:32 UTC 2024 - 18.6K bytes - Viewed (0) -
src/math/sin_s390x.s
TEXT ·sinAsm(SB),NOSPLIT,$0-16 FMOVD x+0(FP), F0 //special case Sin(±0) = ±0 FMOVD $(0.0), F1 FCMPU F0, F1 BEQ sinIsZero LTDBR F0, F0 BLTU L17 FMOVD F0, F5 L2: MOVD $sincosxlim<>+0(SB), R1 FMOVD 0(R1), F1 FCMPU F5, F1 BGT L16 MOVD $sincoss7<>+0(SB), R1 FMOVD 0(R1), F4 MOVD $sincoss6<>+0(SB), R1 FMOVD 0(R1), F1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 31 04:25:54 UTC 2023 - 8.6K bytes - Viewed (0) -
src/cmd/asm/internal/arch/ppc64.go
} // IsPPC64CMP reports whether the op (as defined by an ppc64.A* constant) is // one of the CMP instructions that require special handling. func IsPPC64CMP(op obj.As) bool { switch op { case ppc64.ACMP, ppc64.ACMPU, ppc64.ACMPW, ppc64.ACMPWU, ppc64.AFCMPO, ppc64.AFCMPU: return true } return false } // IsPPC64NEG reports whether the op (as defined by an ppc64.A* constant) is
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 21:53:50 UTC 2024 - 2.2K bytes - Viewed (0) -
test/codegen/math.go
// amd64:"(MOVB\t[$]0)|(XORL\t[A-Z][A-Z0-9]+, [A-Z][A-Z0-9]+)",-"FCMP",-"MOVB\t[$]1" // s390x:"MOV(B|BZ|D)\t[$]0,",-"FCMPU",-"MOV(B|BZ|D)\t[$]1," return 0.5 == float64(uint32(1)) || 1.5 > float64(uint64(1<<63)) } func constantCheck32() bool { // amd64:"MOV(B|L)\t[$]1",-"FCMP",-"MOV(B|L)\t[$]0" // s390x:"MOV(B|BZ|D)\t[$]1,",-"FCMPU",-"MOV(B|BZ|D)\t[$]0," return float32(0.5) <= float32(int64(1)) && float32(1.5) >= float32(int32(-1<<31)) }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Apr 04 15:24:29 UTC 2024 - 6.2K bytes - Viewed (0)