VPSHLDQ $94, X19, X0, K4, X0                       // 62b3fd0c71c35e
	VPSHLDQ $94, 17(SP), X0, K4, X0                    // 62f3fd0c718424110000005e
	VPSHLDQ $94, -17(BP)(SI*4), X0, K4, X0             // 62f3fd0c7184b5efffffff5e
	VPSHLDQ $94, X22, X28, K4, X0                      // 62b39d0471c65e
	VPSHLDQ $94, X7, X28, K4, X0                       // 62f39d0471c75e

	VAESDEC X24, X0, X31                               // 62027d08def8 or 6202fd08def8
	VAESDEC X20, X0, X31                               // 62227d08defc or 6222fd08defc
	VAESDEC X7, X0, X31                                // 62627d08deff or 6262fd08deff
	VAESDEC -7(DI)(R8*1), X0, X31                      // 62227d08debc07f9ffffff or 6222fd08debc07f9ffffff

	VRCP28SD X11, X14, K4, X19                         // 62c28d0ccbdb
	VRCP28SD X17, X14, K4, X19                         // 62a28d0ccbd9
	VRCP28SD X25, X0, K4, X19                          // 6282fd0ccbd9
	VRCP28SD X11, X0, K4, X19                          // 62c2fd0ccbdb
	VRCP28SD X17, X0, K4, X19                          // 62a2fd0ccbd9
	VRCP28SD X25, X14, K4, X13                         // 62128d0ccbe9

	VPSHUFBITQMB X0, X7, K6, K0                        // 62f2450e8fc0
	VPSHUFBITQMB (R8), X7, K6, K0                      // 62d2450e8f00
	VPSHUFBITQMB 15(DX)(BX*2), X7, K6, K0              // 62f2450e8f845a0f000000
	VPSHUFBITQMB X24, X13, K6, K0                      // 6292150e8fc0
	VPSHUFBITQMB X7, X13, K6, K0                       // 62f2150e8fc7
	VPSHUFBITQMB X0, X13, K6, K0                       // 62f2150e8fc0

	VPMINSB 15(DX)(BX*2), Z28, K2, Z13                 // 62721d4238ac5a0f000000 or 62729d4238ac5a0f000000
	VPMINSW X24, X0, K7, X0                            // 62917d0feac0 or 6291fd0feac0
	VPMINSW -7(CX), X0, K7, X0                         // 62f17d0fea81f9ffffff or 62f1fd0fea81f9ffffff
	VPMINSW 15(DX)(BX*4), X0, K7, X0                   // 62f17d0fea849a0f000000 or 62f1fd0fea849a0f000000

	// Test low-8 register for /is4 "hr" operand.
	VPBLENDVB X0, (BX), X1, X2              // c4e3714c1300
	// <XMM0>/Yxr0 tests.
	SHA256RNDS2 X0, (BX), X2   // 0f38cb13
	SHA256RNDS2 X0, (R11), X2  // 410f38cb13
	SHA256RNDS2 X0, X2, X2     // 0f38cbd2
	SHA256RNDS2 X0, X11, X2    // 410f38cbd3
	SHA256RNDS2 X0, (BX), X11  // 440f38cb1b
	SHA256RNDS2 X0, (R11), X11 // 450f38cb1b
	SHA256RNDS2 X0, X2, X11    // 440f38cbda

// LTYPEI spec7	{ outcode(int($1), &$2); }
	IMULL	AX
	IMULL	$4, CX
	IMULL	AX, BX

// LTYPEXC spec9	{ outcode(int($1), &$2); }
	CMPPD	X0, X1, 4
	CMPPD	foo+4(SB), X1, 4

// LTYPEX spec10	{ outcode(int($1), &$2); }
	PINSRD	$1, (AX), X0
	PINSRD	$2, foo+4(FP), X0

// Was bug: LOOP is a branch instruction.
	JCS	2(PC)
loop:
	LOOP	loop // LOOP

// Tests for TLS reference.
	MOVL    (TLS), AX

	const size = 12 * 1024 * 1024
	b.Run(" 00|00 ", func(b *testing.B) { benchmarkErasureDecode(2, 2, 0, 0, size, b) })
	b.Run(" 00|X0 ", func(b *testing.B) { benchmarkErasureDecode(2, 2, 0, 1, size, b) })
	b.Run(" X0|00 ", func(b *testing.B) { benchmarkErasureDecode(2, 2, 1, 0, size, b) })
	b.Run(" X0|X0 ", func(b *testing.B) { benchmarkErasureDecode(2, 2, 1, 1, size, b) })
}

func BenchmarkErasureDecode_4_64KB(b *testing.B) {

	VADDSUBPD X20, X1, X2           // ERROR "invalid instruction"
	VADDSUBPS X0, X20, X2           // ERROR "invalid instruction"
	// Use of K0 for write mask (Yknot0).
	// TODO(quasilyte): improve error message (#21860).
	//                  "K0 can't be used for write mask"
	VADDPD X0, X1, K0, X2           // ERROR "invalid instruction"
	VADDPD Y0, Y1, K0, Y2           // ERROR "invalid instruction"

	V4FMADDPS 17(SP), [Z20-Z23], K2, Z8                // 62725f429a842411000000
	V4FMADDPS -17(BP)(SI*4), [Z20-Z23], K2, Z8         // 62725f429a84b5efffffff
	V4FMADDSS 7(AX), [X0-X3], K5, X22                  // 62e27f0d9bb007000000 or 62e27f2d9bb007000000 or 62e27f4d9bb007000000
	V4FMADDSS (DI), [X0-X3], K5, X22                   // 62e27f0d9b37 or 62e27f2d9b37 or 62e27f4d9b37