Search Options

Results per page
Sort
Preferred Languages
Advance

Results 11 - 20 of 29 for FABS (0.09 sec)

  1. src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/tables.go

    	// FABS <Sd>, <Sn>
    	{0xfffffc00, 0x1e20c000, FABS, instArgs{arg_Sd, arg_Sn}, nil},
    	// FABS <Dd>, <Dn>
    	{0xfffffc00, 0x1e60c000, FABS, instArgs{arg_Dd, arg_Dn}, nil},
    	// FABS <Vd>.<t>, <Vn>.<t>
    	{0xbfbffc00, 0x0ea0f800, FABS, instArgs{arg_Vd_arrangement_sz_Q___2S_00__4S_01__2D_11, arg_Vn_arrangement_sz_Q___2S_00__4S_01__2D_11}, nil},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Aug 16 17:57:48 UTC 2017
    - 211.8K bytes
    - Viewed (0)
  2. src/cmd/internal/obj/x86/anames.go

    	"DECQ",
    	"DECW",
    	"DIVB",
    	"DIVL",
    	"DIVPD",
    	"DIVPS",
    	"DIVQ",
    	"DIVSD",
    	"DIVSS",
    	"DIVW",
    	"DPPD",
    	"DPPS",
    	"EMMS",
    	"ENTER",
    	"EXTRACTPS",
    	"F2XM1",
    	"FABS",
    	"FADDD",
    	"FADDDP",
    	"FADDF",
    	"FADDL",
    	"FADDW",
    	"FBLD",
    	"FBSTP",
    	"FCHS",
    	"FCLEX",
    	"FCMOVB",
    	"FCMOVBE",
    	"FCMOVCC",
    	"FCMOVCS",
    	"FCMOVE",
    	"FCMOVEQ",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 11 18:32:50 UTC 2023
    - 19.1K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/s390x.s

    	FSUB	F3, F12                // b31b00c3
    	FMULS	F4, F11                // b31700b4
    	FMUL	F5, F10                // b31c00a5
    	FDIVS	F6, F9                 // b30d0096
    	FDIV	F7, F8                 // b31d0087
    	FABS	F1, F2                 // b3100021
    	FSQRTS	F3, F4                 // b3140043
    	FSQRT	F5, F15                // b31500f5
    	FIEBR	$0, F0, F1             // b3570010
    	FIDBR	$7, F2, F3             // b35f7032
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Nov 22 03:55:32 UTC 2023
    - 21.6K bytes
    - Viewed (0)
  4. src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/plan9x.go

    				} else if rno >= uint16(S0) && rno <= uint16(S31) {
    					op = fmt.Sprintf("%sS", op)
    				} else if rno >= uint16(D0) && rno <= uint16(D31) {
    					op = fmt.Sprintf("%sD", op)
    				}
    			}
    		}
    
    	case FABS, FNEG, FSQRT, FRINTN, FRINTP, FRINTM, FRINTZ, FRINTA, FRINTX, FRINTI:
    		if r, ok := inst.Args[1].(Reg); ok {
    			rno := uint16(r)
    			if rno >= uint16(S0) && rno <= uint16(S31) {
    				op = fmt.Sprintf("%sS", op)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 16 22:24:28 UTC 2022
    - 17K bytes
    - Viewed (0)
  5. src/cmd/compile/internal/ssa/_gen/PPC64Ops.go

    		{name: "FROUND", argLength: 1, reg: fp11, asm: "FRIN"},                                          // round(arg0), float64
    		{name: "FABS", argLength: 1, reg: fp11, asm: "FABS"},                                            // abs(arg0), float64
    		{name: "FNABS", argLength: 1, reg: fp11, asm: "FNABS"},                                          // -abs(arg0), float64
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 19:59:38 UTC 2024
    - 43.8K bytes
    - Viewed (0)
  6. src/math/all_test.go

    		if f != vf {
    			t.Errorf("%s(%d) = %g, want %g", name, n, f, vf)
    		}
    	}
    }
    
    func TestAbs(t *testing.T) {
    	for i := 0; i < len(vf); i++ {
    		if f := Abs(vf[i]); fabs[i] != f {
    			t.Errorf("Abs(%g) = %g, want %g", vf[i], f, fabs[i])
    		}
    	}
    	for i := 0; i < len(vffabsSC); i++ {
    		if f := Abs(vffabsSC[i]); !alike(fabsSC[i], f) {
    			t.Errorf("Abs(%g) = %g, want %g", vffabsSC[i], f, fabsSC[i])
    		}
    	}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jul 07 17:39:26 UTC 2023
    - 86.8K bytes
    - Viewed (0)
  7. src/cmd/compile/internal/ssa/_gen/PPC64.rules

    (Sqrt ...) => (FSQRT ...)
    (Sqrt32 ...) => (FSQRTS ...)
    (Floor ...) => (FFLOOR ...)
    (Ceil ...) => (FCEIL ...)
    (Trunc ...) => (FTRUNC ...)
    (Round ...) => (FROUND ...)
    (Copysign x y) => (FCPSGN y x)
    (Abs ...) => (FABS ...)
    (FMA ...) => (FMADD ...)
    
    // Lowering extension
    // Note: we always extend to 64 bits even though some ops don't need that many result bits.
    (SignExt8to(16|32|64) ...) => (MOVBreg ...)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 53.2K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/quantization/common/quantization_lib/quantization_utils.cc

        new_scales.reserve(scales.size());
        auto scales_iter = scales.begin();
        for (const auto& f : factor_values) {
          new_scales.push_back(*scales_iter *
                               std::fabs(FloatAttr::getValueAsDouble(f)));
          ++scales_iter;
        }
        // We are assuming symmetric quantization.
        auto new_ele_type = quant::UniformQuantizedPerAxisType::get(
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 08 02:10:16 UTC 2024
    - 43.2K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/quantization/common/quantization_lib/quantization_utils.h

      // the storage type is less than or equal to 8 bits.
      void TensorRangeSanityCheck(quantfork::StatisticsOp op, double& min,
                                  double& max) const {
        double range = std::fabs(max - min);
        if (num_bits <= 8 && range >= 10.0) {
          op.emitWarning()
              << "Tensor range is too wide to be quantized. Use tf.clip_by_value "
                 "or tf.relu6 to narrow the tensor range. Range: "
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Apr 24 20:30:06 UTC 2024
    - 41.7K bytes
    - Viewed (0)
  10. src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/tables.go

    	CRORC:          "crorc",
    	CRXOR:          "crxor",
    	DCBZ:           "dcbz",
    	EQV:            "eqv",
    	EQVCC:          "eqv.",
    	EXTSH:          "extsh",
    	EXTSHCC:        "extsh.",
    	FABS:           "fabs",
    	FABSCC:         "fabs.",
    	FADD:           "fadd",
    	FADDCC:         "fadd.",
    	FCMPO:          "fcmpo",
    	FCMPU:          "fcmpu",
    	FDIV:           "fdiv",
    	FDIVCC:         "fdiv.",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 22 17:16:14 UTC 2022
    - 334.7K bytes
    - Viewed (0)
Back to top