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Results 111 - 120 of 225 for MOVW (0.05 sec)
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test/fixedbugs/issue19507.dir/div_arm.s
// Copyright 2017 The Go Authors. All rights reserved. // Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. TEXT ·f(SB),0,$0-8 MOVW x+0(FP), R1 MOVW x+4(FP), R2 DIVU R1, R2 DIV R1, R2 MODU R1, R2 MOD R1, R2
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 13 23:44:52 UTC 2018 - 271 bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/ppc64.s
MOVD $1234567, R5 // 6405001260a5d687 or 0600001238a0d687 MOVW $1, R3 // 38600001 MOVW $-1, R4 // 3880ffff MOVW $65535, R5 // 6005ffff MOVW $65536, R6 // 3cc00001 MOVW $-32767, R5 // 38a08001 MOVW $-32768, R6 // 38c08000 MOVW $1234567, R5 // 6405001260a5d687 or 0600001238a0d687 // Hex constant 0x80000001
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 21:53:50 UTC 2024 - 50.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPSOps.go
{name: "MOVWstorezero", argLength: 2, reg: gpstore0, aux: "SymOff", asm: "MOVW", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // store 4 bytes of zero to arg0 + auxInt + aux. arg1=mem. // moves (no conversion) {name: "MOVWfpgp", argLength: 1, reg: fpgp, asm: "MOVW"}, // move float32 to int32 (no conversion) {name: "MOVWgpfp", argLength: 1, reg: gpfp, asm: "MOVW"}, // move int32 to float32 (no conversion) // conversions
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 14:43:03 UTC 2023 - 24K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64.s
MOVW $1000000, R4 // 04488852e401a072 MOVW $0xaaaa0000, R1 // MOVW $2863267840, R1 // 4155b552 MOVW $0xaaaaffff, R1 // MOVW $2863333375, R1 // a1aaaa12 MOVW $0xaaaa, R1 // MOVW $43690, R1 // 41559552 MOVW $0xffffaaaa, R1 // MOVW $4294945450, R1 // a1aa8a12
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Dec 08 03:28:17 UTC 2023 - 94.9K bytes - Viewed (0) -
src/cmd/vet/testdata/asm/asm1.s
// Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. //go:build amd64 // +build amd64 TEXT ·arg1(SB),0,$0-2 MOVW x+0(FP), AX // ERROR "\[amd64\] arg1: invalid MOVW of x\+0\(FP\); int8 is 1-byte value" TEXT ·cpx(SB),0,$0-24 // These are ok MOVSS x_real+0(FP), X0 MOVSS x_imag+4(FP), X0 MOVSD y_real+8(FP), X0 MOVSD y_imag+16(FP), X0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat Feb 20 03:54:48 UTC 2021 - 883 bytes - Viewed (0) -
src/math/log10_s390x.s
MOVH $0x0, R1 RISBGN $0, $31, $32, R5, R1 WORD $0xC0590016 //iilf %r5,1507327 BYTE $0xFF BYTE $0xFF MOVW R4, R10 MOVW R5, R11 CMPBLE R10, R11, L2 WORD $0xC0297FEF //iilf %r2,2146435071 BYTE $0xFF BYTE $0xFF MOVW R4, R10 MOVW R2, R11 CMPBLE R10, R11, L16 L3: L1: FMOVD F0, ret+8(FP) RET L2: LTDBR F0, F0 BLEU L13
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 15:34:41 UTC 2019 - 4.7K bytes - Viewed (0) -
src/cmd/cgo/internal/test/issue9400/asm_s390x.s
// will clobber the test pattern created by the caller ADD $(1024 * 8), R15 // Ask signaller to setgid MOVD $·Baton(SB), R5 MOVW $1, 0(R5) // Wait for setgid completion loop: SYNC MOVW ·Baton(SB), R3 CMPBNE R3, $0, loop // Restore stack SUB $(1024 * 8), R15
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 12 12:00:02 UTC 2023 - 580 bytes - Viewed (0) -
src/cmd/cgo/internal/test/issue9400/asm_arm64.s
ADD $(1024 * 8), RSP // Ask signaller to setgid MOVD $·Baton(SB), R0 MOVD $1, R1 storeloop: LDAXRW (R0), R2 STLXRW R1, (R0), R3 CBNZ R3, storeloop // Wait for setgid completion MOVW $0, R1 MOVW $0, R2 loop: LDAXRW (R0), R3 CMPW R1, R3 BNE loop STLXRW R2, (R0), R3 CBNZ R3, loop // Restore stack SUB $(1024 * 8), RSP MOVD R9, R30
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 12 12:00:02 UTC 2023 - 760 bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/riscv64error.s
MOV $8(SP), (X5) // ERROR "address load must target register" MOVB $8(SP), X5 // ERROR "unsupported address load" MOVH $8(SP), X5 // ERROR "unsupported address load" MOVW $8(SP), X5 // ERROR "unsupported address load" MOVF $8(SP), X5 // ERROR "unsupported address load" MOV $1234, 0(SP) // ERROR "constant load must target register"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sun Apr 07 03:32:27 UTC 2024 - 2.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64.s
MOVL foo(SP)(SI*8), DI // 8b3cf4 MOVL foo+32(SP)(R10*1), R11 // 468b5c1420 MOVL foo+32323(SP)(R12*2), R13 // 468bac64437e0000 MOVW foo(SP)(AX*4), R8 // 66448b0484 MOVW foo+32(SP)(R9*8), CX // 66428b4ccc20 MOVW foo+32323(SP)(AX*1), DX // 668b9404437e0000 MOVB foo(SP)(AX*2), AL // 8a0444 MOVB foo+32(SP)(CX*4), AH // 8a648c20 MOVB foo+32323(SP)(CX*8), R9 // 448a8ccc437e0000
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 09 18:57:21 UTC 2019 - 3.3K bytes - Viewed (0)