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Results 1 - 10 of 18 for MOVWstorezero (0.56 sec)

  1. src/cmd/compile/internal/ssa/_gen/RISCV64.rules

    	(MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
    (MOVWstorezero [off1] {sym1} (MOVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) =>
    	(MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
    (MOVDstorezero [off1] {sym1} (MOVaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) && is32Bit(int64(off1)+int64(off2)) =>
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 07 14:57:07 UTC 2024
    - 40.3K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/ARM64.rules

    	&& (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) =>
    	(MOVHstorezero [off1+int32(off2)] {sym} ptr mem)
    (MOVWstorezero [off1] {sym} (ADDconst [off2] ptr) mem) && is32Bit(int64(off1)+off2)
    	&& (ptr.Op != OpSB || !config.ctxt.Flag_dynlink) =>
    	(MOVWstorezero [off1+int32(off2)] {sym} ptr mem)
    (MOVDstorezero [off1] {sym} (ADDconst [off2] ptr) mem) && is32Bit(int64(off1)+off2)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 113.1K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/_gen/MIPS.rules

    (MOVHstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem) && (is16Bit(int64(off1+off2)) || x.Uses == 1) => (MOVHstorezero [off1+off2] {sym} ptr mem)
    (MOVWstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem) && (is16Bit(int64(off1+off2)) || x.Uses == 1) => (MOVWstorezero [off1+off2] {sym} ptr mem)
    
    (MOVBload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2)  =>
    	(MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 24 14:43:03 UTC 2023
    - 35.3K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/_gen/MIPS64.rules

    	 && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVHstorezero [off1+int32(off2)] {sym} ptr mem)
    (MOVWstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2)
    	 && (ptr.Op != OpSB || !config.ctxt.Flag_shared) => (MOVWstorezero [off1+int32(off2)] {sym} ptr mem)
    (MOVVstorezero [off1] {sym} (ADDVconst [off2] ptr) mem) && is32Bit(int64(off1)+off2)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Jul 31 03:59:48 UTC 2023
    - 41.9K bytes
    - Viewed (0)
  5. src/cmd/compile/internal/ssa/_gen/PPC64.rules

    		(MOVHstorezero destptr mem))
    (Zero [4] destptr mem) =>
    	(MOVWstorezero destptr mem)
    (Zero [5] destptr mem) =>
    	(MOVBstorezero [4] destptr
            	(MOVWstorezero destptr mem))
    (Zero [6] destptr mem) =>
    	(MOVHstorezero [4] destptr
    		(MOVWstorezero destptr mem))
    (Zero [7] destptr mem) =>
    	(MOVBstorezero [6] destptr
    		(MOVHstorezero [4] destptr
    			(MOVWstorezero destptr mem)))
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 53.2K bytes
    - Viewed (0)
  6. src/cmd/compile/internal/ssa/_gen/MIPSOps.go

    		{name: "MOVHstorezero", argLength: 2, reg: gpstore0, aux: "SymOff", asm: "MOVH", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // store 2 bytes of zero to arg0 + auxInt + aux.  arg1=mem.
    		{name: "MOVWstorezero", argLength: 2, reg: gpstore0, aux: "SymOff", asm: "MOVW", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // store 4 bytes of zero to arg0 + auxInt + aux.  arg1=mem.
    
    		// moves (no conversion)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 24 14:43:03 UTC 2023
    - 24K bytes
    - Viewed (0)
  7. src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go

    		{name: "MOVHstorezero", argLength: 2, reg: gpstore0, aux: "SymOff", asm: "MOVH", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // store 2 bytes of zero to arg0 + auxInt + aux.  arg1=mem.
    		{name: "MOVWstorezero", argLength: 2, reg: gpstore0, aux: "SymOff", asm: "MOVW", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // store 4 bytes of zero to arg0 + auxInt + aux.  arg1=mem.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 21 19:04:19 UTC 2023
    - 25.2K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/_gen/MIPS64Ops.go

    		{name: "MOVHstorezero", argLength: 2, reg: gpstore0, aux: "SymOff", asm: "MOVH", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // store 2 bytes of zero to arg0 + auxInt + aux.  arg1=mem.
    		{name: "MOVWstorezero", argLength: 2, reg: gpstore0, aux: "SymOff", asm: "MOVW", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // store 4 bytes of zero to arg0 + auxInt + aux.  arg1=mem.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 24 03:36:31 UTC 2023
    - 25.5K bytes
    - Viewed (0)
  9. src/cmd/compile/internal/ssa/_gen/RISCV64Ops.go

    		{name: "MOVHstorezero", argLength: 2, reg: gpstore0, aux: "SymOff", asm: "MOVH", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // 16 bits
    		{name: "MOVWstorezero", argLength: 2, reg: gpstore0, aux: "SymOff", asm: "MOVW", typ: "Mem", faultOnNilArg0: true, symEffect: "Write"}, // 32 bits
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 07 14:57:07 UTC 2024
    - 30.7K bytes
    - Viewed (0)
  10. src/cmd/compile/internal/ssa/rewriteMIPS.go

    	}
    	return false
    }
    func rewriteValueMIPS_OpMIPSMOVWstorezero(v *Value) bool {
    	v_1 := v.Args[1]
    	v_0 := v.Args[0]
    	// match: (MOVWstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
    	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
    	// result: (MOVWstorezero [off1+off2] {sym} ptr mem)
    	for {
    		off1 := auxIntToInt32(v.AuxInt)
    		sym := auxToSym(v.Aux)
    		x := v_0
    		if x.Op != OpMIPSADDconst {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 24 14:43:03 UTC 2023
    - 176.6K bytes
    - Viewed (0)
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