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Results 11 - 14 of 14 for ORL (0.04 sec)

  1. src/cmd/compile/internal/ssa/_gen/AMD64.rules

    (Neg32F x) => (PXOR x (MOVSSconst <typ.Float32> [float32(math.Copysign(0, -1))]))
    (Neg64F x) => (PXOR x (MOVSDconst <typ.Float64> [math.Copysign(0, -1)]))
    
    // Lowering boolean ops
    (AndB ...) => (ANDL ...)
    (OrB ...) => (ORL ...)
    (Not x) => (XORLconst [1] x)
    
    // Lowering pointer arithmetic
    (OffPtr [off] ptr) && is32Bit(off) => (ADDQconst [int32(off)] ptr)
    (OffPtr [off] ptr) => (ADDQ (MOVQconst [off]) ptr)
    
    // Lowering other arithmetic
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 93.9K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/rewriteAMD64.go

    			v.AuxInt = int32ToAuxInt(c)
    			v.AddArg(x)
    			return true
    		}
    		break
    	}
    	// match: (ORL x x)
    	// result: x
    	for {
    		x := v_0
    		if x != v_1 {
    			break
    		}
    		v.copyOf(x)
    		return true
    	}
    	// match: (ORL x l:(MOVLload [off] {sym} ptr mem))
    	// cond: canMergeLoadClobber(v, l, x) && clobber(l)
    	// result: (ORLload x [off] {sym} ptr mem)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 712.7K bytes
    - Viewed (0)
  3. src/runtime/asm_386.s

    GLOBL shifts<>(SB),RODATA,$256
    
    TEXT ·checkASM(SB),NOSPLIT,$0-1
    	// check that masks<>(SB) and shifts<>(SB) are aligned to 16-byte
    	MOVL	$masks<>(SB), AX
    	MOVL	$shifts<>(SB), BX
    	ORL	BX, AX
    	TESTL	$15, AX
    	SETEQ	ret+0(FP)
    	RET
    
    TEXT runtime·return0(SB), NOSPLIT, $0
    	MOVL	$0, AX
    	RET
    
    // Called from cgo wrappers, this function returns g->m->curg.stack.hi.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Mar 15 15:45:13 UTC 2024
    - 43.1K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/opGen.go

    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 239}, // AX CX DX BX BP SI DI
    			},
    			outputs: []outputInfo{
    				{0, 239}, // AX CX DX BX BP SI DI
    			},
    		},
    	},
    	{
    		name:         "ORL",
    		argLen:       2,
    		commutative:  true,
    		resultInArg0: true,
    		clobberFlags: true,
    		asm:          x86.AORL,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 239}, // AX CX DX BX BP SI DI
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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