Search Options

Results per page
Sort
Preferred Languages
Advance

Results 11 - 13 of 13 for addBlock (0.39 sec)

  1. src/cmd/compile/internal/ssa/_gen/AMD64Ops.go

    		// Note: arg0 and arg1 are backwards compared to MOVLstore (to facilitate resultInArg0)!
    		{name: "XADDLlock", argLength: 3, reg: gpstorexchg, asm: "XADDL", typ: "(UInt32,Mem)", aux: "SymOff", resultInArg0: true, clobberFlags: true, faultOnNilArg1: true, hasSideEffects: true, symEffect: "RdWr"},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 04 16:40:24 UTC 2023
    - 98K bytes
    - Viewed (1)
  2. src/cmd/compile/internal/ssa/rewriteAMD64.go

    	return false
    }
    func rewriteValueAMD64_OpAMD64XADDLlock(v *Value) bool {
    	v_2 := v.Args[2]
    	v_1 := v.Args[1]
    	v_0 := v.Args[0]
    	// match: (XADDLlock [off1] {sym} val (ADDQconst [off2] ptr) mem)
    	// cond: is32Bit(int64(off1)+int64(off2))
    	// result: (XADDLlock [off1+off2] {sym} val ptr mem)
    	for {
    		off1 := auxIntToInt32(v.AuxInt)
    		sym := auxToSym(v.Aux)
    		val := v_0
    		if v_1.Op != OpAMD64ADDQconst {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 712.7K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/opGen.go

    			},
    			outputs: []outputInfo{
    				{0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
    			},
    		},
    	},
    	{
    		name:           "XADDLlock",
    		auxType:        auxSymOff,
    		argLen:         3,
    		resultInArg0:   true,
    		clobberFlags:   true,
    		faultOnNilArg1: true,
    		hasSideEffects: true,
    		symEffect:      SymRdWr,
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
Back to top