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Results 1 - 4 of 4 for RdWr (0.06 sec)

  1. src/main/java/jcifs/smb1/smb1/SmbComOpenAndX.java

            this.path = fileName;
            command = SMB_COM_OPEN_ANDX;
    
            desiredAccess = access & 0x3;
            if( desiredAccess == 0x3 ) {
                desiredAccess = 0x2; /* Mmm, I thought 0x03 was RDWR */
            }
            desiredAccess |= SHARING_DENY_NONE;
            desiredAccess &= ~0x1; // Win98 doesn't like GENERIC_READ ?! -- get Access Denied.
    
            // searchAttributes
    Registered: Wed Jun 12 15:45:55 UTC 2024
    - Last Modified: Fri Mar 22 21:10:40 UTC 2019
    - 5.7K bytes
    - Viewed (0)
  2. src/main/java/jcifs/internal/smb1/com/SmbComOpenAndX.java

            this.fileAttributes = fileAttributes;
    
            this.desiredAccess = access & 0x3;
            if ( this.desiredAccess == 0x3 ) {
                this.desiredAccess = 0x2; /* Mmm, I thought 0x03 was RDWR */
            }
    
            // map shareAccess as far as we can
            if ( ( shareAccess & SmbConstants.FILE_SHARE_READ ) != 0 && ( shareAccess & SmbConstants.FILE_SHARE_WRITE ) != 0 ) {
    Registered: Wed Jun 12 15:45:55 UTC 2024
    - Last Modified: Sun Jul 01 13:12:10 UTC 2018
    - 7K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/_gen/S390XOps.go

    		{name: "LAAG", argLength: 3, reg: gpstorelaa, asm: "LAAG", typ: "(UInt64,Mem)", aux: "SymOff", clobberFlags: true, faultOnNilArg0: true, hasSideEffects: true, symEffect: "RdWr"},
    		{name: "AddTupleFirst32", argLength: 2}, // arg1=tuple <x,y>.  Returns <x+arg0,y>.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Feb 24 00:21:13 UTC 2023
    - 52.5K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/_gen/AMD64Ops.go

    		{name: "XCHGL", argLength: 3, reg: gpstorexchg, asm: "XCHGL", aux: "SymOff", resultInArg0: true, faultOnNilArg1: true, hasSideEffects: true, symEffect: "RdWr"},
    		{name: "XCHGQ", argLength: 3, reg: gpstorexchg, asm: "XCHGQ", aux: "SymOff", resultInArg0: true, faultOnNilArg1: true, hasSideEffects: true, symEffect: "RdWr"},
    
    		// Atomic adds.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 04 16:40:24 UTC 2023
    - 98K bytes
    - Viewed (1)
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