- Sort Score
- Result 10 results
- Languages All
Results 11 - 20 of 22 for LXVD2X (0.1 sec)
-
src/internal/bytealg/count_ppc64x.s
BLT tail // Jump to the small string case SRD $5, R4, R20 MOVD R20, CTR MOVD $16, R21 XXLXOR V4, V4, V4 XXLXOR V5, V5, V5 PCALIGN $16 cmploop: LXVD2X (R0)(R3), V0 // Count 32B per loop with two vector accumulators. LXVD2X (R21)(R3), V2 VCMPEQUB V2, V1, V2 VCMPEQUB V0, V1, V0 VPOPCNTD V2, V2 // A match is 0xFF or 0. Count the bits into doubleword buckets. VPOPCNTD V0, V0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Aug 14 20:30:44 UTC 2023 - 3.6K bytes - Viewed (0) -
src/crypto/sha256/sha256block_ppc64x.s
MOVD $0x0c0, R_x0c0 MOVD $0x0d0, R_x0d0 MOVD $0x0e0, R_x0e0 MOVD $0x0f0, R_x0f0 MOVD $0x100, R_x100 MOVD $0x110, R_x110 loop: MOVD TBL_STRT, TBL LVX (TBL)(R_x000), KI LXVD2X (INP)(R_x000), V8 // load v8 in advance // Offload to VSR24-31 (aka FPR24-31) XXLOR V0, V0, VS24 XXLOR V1, V1, VS25 XXLOR V2, V2, VS26 XXLOR V3, V3, VS27 XXLOR V4, V4, VS28 XXLOR V5, V5, VS29
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 14.4K bytes - Viewed (0) -
src/cmd/internal/notsha256/sha256block_ppc64x.s
MOVD $0x0c0, R_x0c0 MOVD $0x0d0, R_x0d0 MOVD $0x0e0, R_x0e0 MOVD $0x0f0, R_x0f0 MOVD $0x100, R_x100 MOVD $0x110, R_x110 loop: MOVD TBL_STRT, TBL LVX (TBL)(R_x000), KI LXVD2X (INP)(R_x000), V8 // load v8 in advance // Offload to VSR24-31 (aka FPR24-31) XXLOR V0, V0, VS24 XXLOR V1, V1, VS25 XXLOR V2, V2, VS26 XXLOR V3, V3, VS27 XXLOR V4, V4, VS28 XXLOR V5, V5, VS29
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:27 UTC 2023 - 14.5K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/anames.go
"VNCIPH", "VNCIPHER", "VNCIPHERLAST", "VSBOX", "VSHASIGMA", "VSHASIGMAW", "VSHASIGMAD", "VMRGEW", "VMRGOW", "VCLZLSBB", "VCTZLSBB", "LXV", "LXVL", "LXVLL", "LXVD2X", "LXVW4X", "LXVH8X", "LXVB16X", "LXVX", "LXVDSX", "STXV", "STXVL", "STXVLL", "STXVD2X", "STXVW4X", "STXVH8X", "STXVB16X", "STXVX", "LXSDX", "STXSDX",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Apr 01 18:50:29 UTC 2024 - 6.7K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/plan9.go
if args[1] == "0" { return op + " (" + args[2] + ")," + args[0] } return op + " (" + args[2] + ")(" + args[1] + ")," + args[0] case LXVX, LXVD2X, LXVW4X, LXVH8X, LXVB16X, LVX, LVXL, LVSR, LVSL, LVEBX, LVEHX, LVEWX, LXSDX, LXSIWAX: return op + " (" + args[2] + ")(" + args[1] + ")," + args[0] case LXV: return op + " " + args[1] + "," + args[0]
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 22 17:16:14 UTC 2022 - 10.9K bytes - Viewed (0) -
src/internal/bytealg/index_ppc64x.s
// Unrolled index2to16 loop by 4 on ppc64le/power9 // Work is still needed for a big endian // implementation on power9. //go:build ppc64 || ppc64le #include "go_asm.h" #include "textflag.h" // Needed to swap LXVD2X loads to the correct // byte order to work on POWER8. #ifdef GOARCH_ppc64 DATA byteswap<>+0(SB)/8, $0x0001020304050607 DATA byteswap<>+8(SB)/8, $0x08090a0b0c0d0e0f #else DATA byteswap<>+0(SB)/8, $0x0706050403020100
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 16:47:45 UTC 2023 - 31.6K bytes - Viewed (0) -
src/math/big/arith_ppc64x.s
VSPLTB $7, V6, V4 MTVSRD R5, VS39 // ŝ VSPLTB $7, V7, V2 ADD $-2, R4, R16 PCALIGN $16 loopback: ADD $-1, R8, R10 SLD $3, R10 LXVD2X (R6)(R10), VS32 // load x[i-1], x[i] SLD $3, R8, R12 LXVD2X (R6)(R12), VS33 // load x[i], x[i+1] VSRD V0, V4, V3 // x[i-1]>>s, x[i]>>s VSLD V1, V2, V5 // x[i]<<ŝ, x[i+1]<<ŝ
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 18:17:17 UTC 2024 - 16.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/ppc64.s
VSHASIGMAW $1, $15, V1, V2 // 10418e82 VSHASIGMAD $2, V1, $15, V2 // 104196c2 VSHASIGMAD $2, $15, V1, V2 // 104196c2 LXVD2X (R3)(R4), VS1 // 7c241e98 LXVD2X (R3)(R0), VS1 // 7c201e98 LXVD2X (R3), VS1 // 7c201e98 LXVDSX (R3)(R4), VS1 // 7c241a98 LXVDSX (R3)(R0), VS1 // 7c201a98 LXVDSX (R3), VS1 // 7c201a98
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 21:53:50 UTC 2024 - 50.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64Ops.go
unsafePoint: true, }, // R31 is temp register // Loop code: // MOVD len/32,R31 set up loop ctr // MOVD R31,CTR // MOVD $16,R31 index register // loop: // LXVD2X (R0)(R4),VS32 // LXVD2X (R31)(R4),VS33 // ADD R4,$32 increment src // STXVD2X VS32,(R0)(R3) // STXVD2X VS33,(R31)(R3) // ADD R3,$32 increment dst // BC 16,0,loop branch ctr
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 43.8K bytes - Viewed (0) -
src/cmd/compile/internal/ppc64/ssa.go
// number of moves are generated based on the // size. // When moving >= 64 bytes a loop is used // MOVD len/32,REG_TMP // MOVD REG_TMP,CTR // MOVD $16,REG_TMP // top: // LXVD2X (R0)(R21),VS32 // LXVD2X (R31)(R21),VS33 // ADD $32,R21 // STXVD2X VS32,(R0)(R20) // STXVD2X VS33,(R31)(R20) // ADD $32,R20 // BC 16,0,top // Bytes not moved by this loop are moved
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 55.4K bytes - Viewed (0)