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tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/vhlo.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Mar 14 19:15:40 UTC 2024 - 31.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/lstm.mlir
%cst = "tfl.no_value"() {value = unit} : () -> none
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 20.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/annotate-parameter-replication.mlir
} // CHECK-LABEL: func @_func // CHECK-SAME: %[[ARG0:.*]]: tensor<?xi32>, // CHECK-SAME: %[[ARG1:.*]]: tensor<?xi32> {mhlo.is_same_data_across_replicas = true} // CHECK-SAME: %[[ARG2:.*]]: tensor<?xi32>) func.func @_func(%arg0: tensor<?xi32>, %arg1: tensor<?xi32>, %arg2: tensor<?xi32>) -> tensor<?xi32> { %0 = "tf._D"(%arg0, %arg1) : (tensor<?xi32>, tensor<?xi32>) -> tensor<?xi32> func.return %0 : tensor<?xi32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jul 25 02:54:34 UTC 2023 - 4.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfr/tests/ops.mlir
// ----- // CHECK-LABEL: call_op func.func @call_op(%arg0: !tfr.tensor<T>, %arg1: !tfr.tensor_list<TL>, %arg2: i32) -> !tfr.tensor<K> { %0 = tfr.call @Foo(%arg0, %arg1, %arg2) : (!tfr.tensor<T>, !tfr.tensor_list<TL>, i32) -> !tfr.tensor<K> func.return %0 : !tfr.tensor<K> } // ----- // CHECK-LABEL: call_op_arg_attr(%arg0: i32) -> !tfr.tensor<K> func.func @call_op_arg_attr(%arg0: i32) -> !tfr.tensor<K> {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Jan 14 22:15:06 UTC 2023 - 13.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tpu_update_embedding_enqueue_op_inputs.mlir
func.func @check_enqueue_ops_with_different_attr_disallowed(%arg0: tensor<?x2xi32>, %arg1: tensor<?x2xi32>, %arg2 :tensor<?x2xi32>, %arg3: tensor<?xi32>, %arg4: tensor<?xi32>, %arg5: tensor<?xi32>, %arg6: tensor<!tf_type.string>, %arg7: tensor<!tf_type.string>, %arg8: tensor<i1>) -> () { %0 = "tf.Const"() {value = dense<[]> : tensor<0xf32>} : () -> tensor<0xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 5.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/tests/legalize-tf-with-tf2xla-hlo-importer.mlir
// CHECK: %[[OUT:.*]], %[[MEAN:.*]], %[[VAR:.*]] = "mhlo.batch_norm_training"({{.*}}, %arg1, %arg2) <{epsilon = 1.000000e-03 : f32, feature_index = 3 : i64}> : (tensor<8x8x8x8xf32>, tensor<8xf32>, tensor<8xf32>) -> (tensor<8x8x8x8xf32>, tensor<8xf32>, tensor<8xf32>)
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Apr 06 15:32:52 UTC 2024 - 38.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/convert-tf-control-flow-to-scf.mlir
// CHECK-SAME: (%[[ARG0:.*]]: tensor<f32>, %[[ARG1:.*]]: tensor<f32>, %[[ARG2:.*]]: tensor<*xf32>) func.func @test_supported_lowering_of_tf_while_region(%arg0: tensor<f32>, %arg1: tensor<f32>, %arg2: tensor<*xf32>) -> (tensor<f32>){ %0:2 = "tf.WhileRegion"(%arg0, %arg2) ({ ^bb0(%arg3: tensor<f32>, %arg4: tensor<*xf32>): %1 = "tf.Identity"(%arg3) : (tensor<f32>) -> tensor<f32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 5.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/tfl_legalize_hlo.mlir
%4:2 = "mhlo.reduce"(%arg0, %3, %0, %1) ({ ^bb0(%arg1: tensor<f32>, %arg2: tensor<i32>, %arg3: tensor<f32>, %arg4: tensor<i32>): %7 = "mhlo.compare"(%arg1, %arg3) {comparison_direction = #mhlo<comparison_direction GT>} : (tensor<f32>, tensor<f32>) -> tensor<i1> %8 = "mhlo.compare"(%arg1, %arg1) {comparison_direction = #mhlo<comparison_direction NE>} : (tensor<f32>, tensor<f32>) -> tensor<i1>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 40.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/mlrt/while_to_map_fn.mlir
func.func private @"map/while/LoopCond_cond"(%arg0: tensor<*xi32>, %arg1: tensor<*xi32>, %arg2: tensor<f32>, %arg3: tensor<i32>, %arg4: tensor<2x!tf_type.resource<tensor<*x!tf_type.string>>>, %arg5: tensor<f32>, %arg6: tensor<2x!tf_type.resource<tensor<*xui8>>>) -> tensor<i1> { %outputs = "tf.Less"(%arg0, %arg3) {device = ""} : (tensor<*xi32>, tensor<i32>) -> tensor<*xi1>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Apr 23 06:40:22 UTC 2024 - 68.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARMOps.go
{name: "SUBshiftRLreg", argLength: 3, reg: gp31, asm: "SUB"}, // arg0 - arg1>>arg2, unsigned shift {name: "SUBshiftRAreg", argLength: 3, reg: gp31, asm: "SUB"}, // arg0 - arg1>>arg2, signed shift {name: "RSBshiftLLreg", argLength: 3, reg: gp31, asm: "RSB"}, // arg1<<arg2 - arg0 {name: "RSBshiftRLreg", argLength: 3, reg: gp31, asm: "RSB"}, // arg1>>arg2 - arg0, unsigned shift
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 24 00:21:13 UTC 2023 - 41K bytes - Viewed (0)