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src/cmd/link/internal/amd64/asm.go
// THE SOFTWARE. package amd64 import ( "cmd/internal/objabi" "cmd/internal/sys" "cmd/link/internal/ld" "cmd/link/internal/loader" "cmd/link/internal/sym" "debug/elf" "log" ) func PADDR(x uint32) uint32 { return x &^ 0x80000000 } func gentext(ctxt *ld.Link, ldr *loader.Loader) { initfunc, addmoduledata := ld.PrepareAddmoduledata(ctxt) if initfunc == nil { return }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Aug 23 05:58:20 UTC 2023 - 21K bytes - Viewed (0) -
src/cmd/internal/objabi/reloctype.go
R_LOONG64_TLS_IE_HI R_LOONG64_TLS_IE_LO // R_LOONG64_GOT_HI and R_LOONG64_GOT_LO resolves a GOT-relative instruction sequence, // usually an pcalau12i followed by another ld or addi instruction. R_LOONG64_GOT_HI R_LOONG64_GOT_LO // R_JMPLOONG64 resolves to non-PC-relative target address of a JMP instruction, // by encoding the address into the instruction. R_JMPLOONG64
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Feb 27 17:26:07 UTC 2024 - 17.3K bytes - Viewed (0) -
src/crypto/aes/asm_ppc64x.s
P8_LXVB16X(INP, R0, IN0) ADD $0x10, INP, INP MOVD $0x20, TEMP CMPW ROUNDS, $12 LVX (PTR)(R0), RCON // lvx 4,0,6 Load first 16 bytes into RCON LVX (PTR)(TEMP), MASK ADD $0x10, PTR, PTR // addi 6,6,0x10 PTR to next 16 bytes of RCON MOVD $8, CNT // li 7,8 CNT = 8 VXOR ZERO, ZERO, ZERO // vxor 0,0,0 Zero to be zero :)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 20 18:05:32 UTC 2024 - 18.6K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/ppc64.s
// Hex constant 0xFFFFFFFE00010001 ADD $-8589869055, R5 // 3fe0fffe63ff00017bff83e463ff00017cbf2a14 or 0602000138a50001 //TODO: this compiles to add r5,r6,r0. It should be addi r5,r6,0. // this is OK since r0 == $0, but the latter is preferred. ADD $0, R6, R5 // 7ca60214
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 21:53:50 UTC 2024 - 50.2K bytes - Viewed (0) -
src/debug/elf/elf.go
} // ELF32 Program header. type Prog32 struct { Type uint32 /* Entry type. */ Off uint32 /* File offset of contents. */ Vaddr uint32 /* Virtual address in memory image. */ Paddr uint32 /* Physical address (not used). */ Filesz uint32 /* Size of contents in file. */ Memsz uint32 /* Size of contents in memory. */ Flags uint32 /* Access permission flags. */
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 00:01:16 UTC 2024 - 134.6K bytes - Viewed (0) -
src/cmd/compile/internal/ppc64/ssa.go
case nil: // If aux offset and aux int are both 0, and the same // input and output regs are used, no instruction // needs to be generated, since it would just be // addi rx, rx, 0. if v.AuxInt != 0 || v.Args[0].Reg() != v.Reg() { p := s.Prog(ppc64.AMOVD) p.From.Type = obj.TYPE_ADDR p.From.Reg = v.Args[0].Reg() p.From.Offset = v.AuxInt p.To.Type = obj.TYPE_REG
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 55.4K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/tools/internal/stdlib/manifest.go
{"Prog32.Memsz", Field, 0}, {"Prog32.Off", Field, 0}, {"Prog32.Paddr", Field, 0}, {"Prog32.Type", Field, 0}, {"Prog32.Vaddr", Field, 0}, {"Prog64", Type, 0}, {"Prog64.Align", Field, 0}, {"Prog64.Filesz", Field, 0}, {"Prog64.Flags", Field, 0}, {"Prog64.Memsz", Field, 0}, {"Prog64.Off", Field, 0}, {"Prog64.Paddr", Field, 0}, {"Prog64.Type", Field, 0}, {"Prog64.Vaddr", Field, 0},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 02 02:20:05 UTC 2024 - 534.2K bytes - Viewed (0) -
okhttp/src/test/resources/okhttp3/internal/publicsuffix/public_suffix_list.dat
hotel.hu ingatlan.hu jogasz.hu konyvelo.hu lakas.hu media.hu news.hu reklam.hu sex.hu shop.hu suli.hu szex.hu tozsde.hu utazas.hu video.hu // id : https://pandi.id/en/domain/registration-requirements/ id ac.id biz.id co.id desa.id go.id mil.id my.id net.id or.id ponpes.id sch.id web.id
Registered: Sun Jun 16 04:42:17 UTC 2024 - Last Modified: Wed Dec 20 23:27:07 UTC 2023 - 240.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/tests/legalize-tf.mlir
// CHECK: tensor.extract {{.*}} : tensor<1xi64> // CHECK: tensor.extract {{.*}} : tensor<1xi64> // CHECK: arith.index_cast {{.*}} : index to i64 // CHECK: arith.cmpi eq, {{.*}} : i64 // CHECK: arith.addi {{.*}} : i64 // CHECK: tensor.dim {{.*}} : tensor<4xi32> // CHECK: arith.index_cast {{.*}} : index to i64 // CHECK: select {{.*}} : i64 // CHECK: arith.index_cast {{.*}} : i64 to index
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon May 06 18:46:23 UTC 2024 - 335.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
{0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, { name: "ADDI", auxType: auxInt64, argLen: 1, asm: riscv.AADDI, reg: regInfo{ inputs: []inputInfo{ {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)