MTVSRHM R1, V1                          // 10310e42
	MTVSRQM R1, V1                          // 10340e42
	MTVSRWM R1, V1                          // 10320e42
	PADDI R3, $1234567890, $1, R4           // 06104996388302d2
	PADDI R0, $1234567890, $0, R4           // 06004996388002d2
	PADDI R0, $1234567890, $1, R4           // 06104996388002d2
	PDEPD R1, R2, R3                        // 7c231138
	PEXTD R1, R2, R3                        // 7c231178

(AND <t> x:(MOVDconst [m]) n) && t.Size() == 4 && isPPC64WordRotateMask(m) => (RLWINM [encodePPC64RotateMask(0,m,32)] n)

// When PCRel is supported, paddi can add a 34b signed constant in one instruction.
(ADD (MOVDconst [m]) x) && supportsPPC64PCRel() && (m<<30)>>30 == m => (ADDconst [m] x)

		// If EH == 0, omit printing EH.
		eh := inst.Args[3].(Imm)
		if eh == 0 {
			argList = inst.Args[:3]
		}
		buf.WriteString(inst.Op.String())

	case "paddi":
		// There are several extended mnemonics.  Notably, "pla" is
		// the only valid mnemonic for paddi (R=1), In this case, RA must
		// always be 0.  Otherwise it is invalid.
		r := inst.Args[3].(Imm)
		ra := inst.Args[1].(Reg)
		str := opName
		if ra == R0 {

	ADD $131073, R3              lis  r31, 2                paddi r3, r3, 131073
	                             addi r31, 1
	                             add  r3,r31,r3

	MOVD $131073, R3             lis  r3, 2                 pli r3, 131073
	                             addi r3, 1

	MOVD $mypackage·foo(SB), R3  addis r2, r3, ...          pla r3, ...
	                             addi  r3, r3, ...
*/

	"PMXVBF16GER2NN",
	"PMXVBF16GER2",
	"PLXVP",
	"PLXV",
	"PLXSSP",
	"PLXSD",
	"PLWZ",
	"PLWA",
	"PLQ",
	"PLHZ",
	"PLHA",
	"PLFS",
	"PLFD",
	"PLD",
	"PLBZ",
	"PADDI",
}

var GenOpcodes = [...]uint32{
	0x7c030162, // AXXSETACCZ
	0x7c010162, // AXXMTACC
	0x7c000162, // AXXMFACC
	0xf0000768, // AXXGENPCVWM
	0xf000072a, // AXXGENPCVHM
	0xf000076a, // AXXGENPCVDM

			break
		}
		if p.From.Offset&0xFFFF == 0 {
			// The constant can be added using ADDIS
			p.As = AADDIS
			p.From.Offset >>= 16
		} else if buildcfg.GOPPC64 >= 10 {
			// Let the assembler generate paddi for large constants.
			break
		} else if (p.From.Offset < -0x8000 && int64(int32(p.From.Offset)) == p.From.Offset) || (p.From.Offset > 0xFFFF && p.From.Offset < 0x7FFF8000) {

	LXVRWX:         "lxvrwx",
	MTVSRBM:        "mtvsrbm",
	MTVSRBMI:       "mtvsrbmi",
	MTVSRDM:        "mtvsrdm",
	MTVSRHM:        "mtvsrhm",
	MTVSRQM:        "mtvsrqm",
	MTVSRWM:        "mtvsrwm",
	PADDI:          "paddi",
	PDEPD:          "pdepd",
	PEXTD:          "pextd",
	PLBZ:           "plbz",
	PLD:            "pld",
	PLFD:           "plfd",
	PLFS:           "plfs",
	PLHA:           "plha",

	// Add in the state
	PADDD ·chacha20Constants<>(SB), A0; PADDD ·chacha20Constants<>(SB), A1; PADDD ·chacha20Constants<>(SB), A2; PADDD ·chacha20Constants<>(SB), A3
	PADDD state1Store, B0; PADDD state1Store, B1; PADDD state1Store, B2; PADDD state1Store, B3
	PADDD state2Store, C0; PADDD state2Store, C1; PADDD state2Store, C2; PADDD state2Store, C3
	PADDD ctr0Store, D0; PADDD ctr1Store, D1; PADDD ctr2Store, D2; PADDD ctr3Store, D3

	"OUTL",
	"OUTSB",
	"OUTSL",
	"OUTSW",
	"OUTW",
	"PABSB",
	"PABSD",
	"PABSW",
	"PACKSSLW",
	"PACKSSWB",
	"PACKUSDW",
	"PACKUSWB",
	"PADDB",
	"PADDL",
	"PADDQ",
	"PADDSB",
	"PADDSW",
	"PADDUSB",
	"PADDUSW",
	"PADDW",
	"PALIGNR",
	"PAND",
	"PANDN",
	"PAUSE",
	"PAVGB",
	"PAVGW",
	"PBLENDVB",
	"PBLENDW",
	"PCLMULQDQ",
	"PCMPEQB",
	"PCMPEQL",

// LTYPERT spec10	{ outcode($1, &$2); }
	JCS	2(PC)
	RETFL	$4

// Was bug: LOOP is a branch instruction.
	JCS	2(PC)
loop:
	LOOP	loop // LOOP

	// Intel pseudonyms for our own renamings.
	PADDD	M2, M1 // PADDL M2, M1
	MOVDQ2Q	X1, M1 // MOVQ X1, M1
	MOVNTDQ	X1, (AX)	// MOVNTO X1, (AX)
	MOVOA	(AX), X1	// MOVO (AX), X1

// Tests for SP indexed addresses.
	MOVQ	foo(SP)(AX*1), BX		// 488b1c04