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Results 21 - 30 of 127 for andc (0.09 sec)
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test/phiopt.go
} return x // ERROR "converted OpPhi to OrB$" } //go:noinline func f5and(a int, b bool) bool { var x bool if a == 0 { x = b } else { x = false } return x // ERROR "converted OpPhi to AndB$" } //go:noinline func f6or(a int, b bool) bool { x := b if a == 0 { // f6or has side effects so the OpPhi should not be converted. x = f6or(a, b) } return x } //go:noinline
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:25 UTC 2023 - 2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64.rules
(MOVWZreg ((OR|XOR|AND) <t> x (MOVWZreg y))) => (MOVWZreg ((OR|XOR|AND) <t> x y)) (MOVHZreg ((OR|XOR|AND) <t> x (MOVWZreg y))) => (MOVHZreg ((OR|XOR|AND) <t> x y)) (MOVHZreg ((OR|XOR|AND) <t> x (MOVHZreg y))) => (MOVHZreg ((OR|XOR|AND) <t> x y)) (MOVBZreg ((OR|XOR|AND) <t> x (MOVWZreg y))) => (MOVBZreg ((OR|XOR|AND) <t> x y)) (MOVBZreg ((OR|XOR|AND) <t> x (MOVHZreg y))) => (MOVBZreg ((OR|XOR|AND) <t> x y))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 53.2K bytes - Viewed (0) -
src/crypto/sha256/sha256block_386.s
RORL $2, AX; \ MOVL (a*4)(DI), DX; \ ANDL (b*4)(DI), BX; \ RORL $13, DX; \ MOVL (a*4)(DI), CX; \ ANDL (c*4)(DI), CX; \ XORL DX, AX; \ XORL CX, BX; \ MOVL (a*4)(DI), DX; \ MOVL (b*4)(DI), CX; \ RORL $22, DX; \ ANDL (a*4)(DI), CX; \ XORL CX, BX; \ XORL DX, AX; \ ADDL AX, BX // Calculate T1 and T2, then e = d + T1 and a = T1 + T2.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 8.2K bytes - Viewed (0) -
src/crypto/md5/md5block_386.s
LEAL const(a)(DI*1), a; \ ANDL b, BP; \ XORL d, BP; \ MOVL (index*4)(SI), DI; \ ADDL BP, a; \ ROLL $shift, a; \ MOVL c, BP; \ ADDL b, a #define ROUND2(a, b, c, d, index, const, shift) \ LEAL const(a)(DI*1),a; \ MOVL d, DI; \ ANDL b, DI; \ MOVL d, BP; \ NOTL BP; \ ANDL c, BP; \ ORL DI, BP; \ MOVL (index*4)(SI),DI; \ ADDL BP, a; \ ROLL $shift, a; \ ADDL b, a
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 4.5K bytes - Viewed (0) -
src/crypto/md5/md5block_amd64.s
// Uses https://github.com/animetosho/md5-optimisation#dependency-shortcut-in-g-function #define ROUND2(a, b, c, d, index, const, shift) \ XORL R11, R9; \ ADDL $const, a; \ ADDL R8, a; \ ANDL b, R10; \ ANDL c, R9; \ MOVL (index*4)(SI),R8; \ ADDL R9, a; \ ADDL R10, a; \ MOVL c, R9; \ MOVL c, R10; \ ROLL $shift, a; \ ADDL b, a ROUND2(AX,BX,CX,DX, 6,0xf61e2562, 5);
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 4.8K bytes - Viewed (0) -
test/codegen/memops.go
// amd64: `SUBL\t8\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*4\), [A-Z]+[0-9]*` s -= x[i+2] // 386: `IMULL\t12\([A-Z]+\)\([A-Z]+\*4\), [A-Z]+` s *= x[i+3] // 386: `ANDL\t16\([A-Z]+\)\([A-Z]+\*4\), [A-Z]+` // amd64: `ANDL\t16\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*4\), [A-Z]+[0-9]*` s &= x[i+4] // 386: `ORL\t20\([A-Z]+\)\([A-Z]+\*4\), [A-Z]+` // amd64: `ORL\t20\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*4\), [A-Z]+[0-9]*`
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 04 16:40:24 UTC 2023 - 12.5K bytes - Viewed (0) -
src/internal/runtime/atomic/bench_test.go
func BenchmarkAnd8(b *testing.B) { var x [512]uint8 // give byte its own cache line sink = &x for i := 0; i < b.N; i++ { atomic.And8(&x[255], uint8(i)) } } func BenchmarkAnd(b *testing.B) { var x [128]uint32 // give x its own cache line sink = &x for i := 0; i < b.N; i++ { atomic.And(&x[63], uint32(i)) } } func BenchmarkAnd8Parallel(b *testing.B) { var x [512]uint8 // give byte its own cache line
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 25 19:53:03 UTC 2024 - 3.2K bytes - Viewed (0) -
src/internal/runtime/atomic/atomic_mips64x.go
//go:noescape func LoadAcq64(ptr *uint64) uint64 //go:noescape func LoadAcquintptr(ptr *uintptr) uintptr //go:noescape func And8(ptr *uint8, val uint8) //go:noescape func Or8(ptr *uint8, val uint8) // NOTE: Do not add atomicxor8 (XOR is not idempotent). //go:noescape func And(ptr *uint32, val uint32) //go:noescape func Or(ptr *uint32, val uint32) //go:noescape func And32(ptr *uint32, val uint32) uint32
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat May 11 21:29:34 UTC 2024 - 2.1K bytes - Viewed (0) -
src/internal/runtime/atomic/atomic_s390x.go
} //go:nosplit //go:noinline func StoreReluintptr(ptr *uintptr, val uintptr) { *ptr = val } //go:noescape func And8(ptr *uint8, val uint8) //go:noescape func Or8(ptr *uint8, val uint8) // NOTE: Do not add atomicxor8 (XOR is not idempotent). //go:noescape func And(ptr *uint32, val uint32) //go:noescape func Or(ptr *uint32, val uint32) //go:noescape
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 25 19:53:03 UTC 2024 - 2.5K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/s390x.s
POPCNT R3, R4 // b9e10043 AND R1, R2 // b9800021 AND R1, R2, R3 // b9e42031 AND $-2, R1 // a517fffe AND $-65536, R1 // c01bffff0000 AND $1, R1 // c0a100000001b980001a ANDW R1, R2 // 1421 ANDW R1, R2, R3 // b9f42031 ANDW $1, R1 // c01b00000001 ANDW $131071, R1 // a5160001
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 22 03:55:32 UTC 2023 - 21.6K bytes - Viewed (0)