- Sort Score
- Result 10 results
- Languages All
Results 11 - 18 of 18 for fpscrx (0.2 sec)
-
src/cmd/vendor/rsc.io/markdown/entity.go
"▪": "\u25aa", "𝔽": "\U0001d53d", "∀": "\u2200", "ℱ": "\u2131", "ℱ": "\u2131", "Ѓ": "\u0403", ">": "\u003e", "Γ": "\u0393",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jan 24 13:01:26 UTC 2024 - 101K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/sys/unix/ztypes_freebsd_arm.go
} type Sigset_t struct { Val [4]uint32 } type Reg struct { R [13]uint32 Sp uint32 Lr uint32 Pc uint32 Cpsr uint32 } type FpReg struct { Fpsr uint32 Fpr [8]FpExtendedPrecision } type FpExtendedPrecision struct { Exponent uint32 Mantissa_hi uint32 Mantissa_lo uint32 } type PtraceIoDesc struct { Op int32
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:33 UTC 2023 - 9.5K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/a.out.go
C_SOREG /* An $n+reg memory arg where n is a 16 bit signed offset */ C_LOREG /* An $n+reg memory arg where n is a 32 bit signed offset */ C_XOREG /* An reg+reg memory arg */ C_FPSCR /* The fpscr register */ C_LR /* The link register */ C_CTR /* The count register */ C_ANY /* Any argument */ C_GOK /* A non-matched argument */ C_ADDR /* A symbolic memory location */
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Apr 01 18:50:29 UTC 2024 - 16K bytes - Viewed (0) -
src/runtime/asm_arm.s
// disable runfast (flush-to-zero) mode of vfp if runtime.goarmsoftfp == 0 MOVB runtime·goarmsoftfp(SB), R11 CMP $0, R11 BNE 4(PC) WORD $0xeef1ba10 // vmrs r11, fpscr BIC $(1<<24), R11 WORD $0xeee1ba10 // vmsr fpscr, r11 RET TEXT runtime·mstart(SB),NOSPLIT|TOPFRAME,$0 BL runtime·mstart0(SB) RET // not reached /* * go-routine */ // void gogo(Gobuf*)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 23 21:00:52 UTC 2024 - 32.1K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64.s
MRS FAR_EL1, R9 // 096038d5 MSR R25, FAR_EL1 // 196018d5 MRS FPCR, R1 // 01443bd5 MSR R27, FPCR // 1b441bd5 MRS FPSR, R5 // 25443bd5 MSR R15, FPSR // 2f441bd5 MRS ID_AA64AFR0_EL1, R19 // 930538d5 MRS ID_AA64AFR1_EL1, R24 // b80538d5
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Dec 08 03:28:17 UTC 2023 - 94.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Dec 15 20:51:01 UTC 2023 - 69K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64Ops.go
gpfp = regInfo{inputs: []regMask{gp}, outputs: []regMask{fp}} fp21 = regInfo{inputs: []regMask{fp, fp}, outputs: []regMask{fp}} fp31 = regInfo{inputs: []regMask{fp, fp, fp}, outputs: []regMask{fp}} fp2cr = regInfo{inputs: []regMask{fp, fp}} fpload = regInfo{inputs: []regMask{gp | sp | sb}, outputs: []regMask{fp}} fploadidx = regInfo{inputs: []regMask{gp | sp | sb, gp | sp | sb}, outputs: []regMask{fp}}
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 43.8K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/asm9.go
} case 64: /* mtfsf fr[, $m] {,fpcsr} */ var v int32 if p.From3Type() != obj.TYPE_NONE { v = c.regoff(p.GetFrom3()) & 255 } else { v = 255 } o1 = OP_MTFSF | uint32(v)<<17 | uint32(p.From.Reg)<<11 case 65: /* MOVFL $imm,FPSCR(n) => mtfsfi crfd,imm */ if p.To.Reg == 0 { c.ctxt.Diag("must specify FPSCR(n)\n%v", p) }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 13:55:28 UTC 2024 - 156.1K bytes - Viewed (0)