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Results 31 - 40 of 80 for LOGICAL (0.09 sec)

  1. platforms/jvm/platform-jvm/src/main/java/org/gradle/api/tasks/SourceSet.java

    import org.gradle.api.file.FileCollection;
    import org.gradle.api.file.SourceDirectorySet;
    import org.gradle.api.plugins.ExtensionAware;
    
    import javax.annotation.Nullable;
    
    /**
     * A {@code SourceSet} represents a logical group of Java source and resource files. They
     * are covered in more detail in the
     * <a href="https://docs.gradle.org/current/userguide/building_java_projects.html#sec:java_source_sets">user manual</a>.
     * <p>
    Registered: Wed Jun 12 18:38:38 UTC 2024
    - Last Modified: Thu Sep 28 15:09:49 UTC 2023
    - 12.8K bytes
    - Viewed (0)
  2. tensorflow/compiler/aot/codegen_test_h.golden

    // o Calls to non-const methods require exclusive access to the object.
    // o Concurrent calls to const methods are OK, if those calls are made while it
    //   is guaranteed that no thread may call a non-const method.
    //
    // The logical function signature is:
    //   ((unknown): f32[1,2], (unknown): s64[3,4], (unknown): f32[1], (unknown): f32[1], (unknown): s32[5]) -> (u32[5,6], f32[1], s32[5])
    //
    // Memory stats:
    //   arg bytes total:    392
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 01:20:01 UTC 2024
    - 16.6K bytes
    - Viewed (0)
  3. src/archive/tar/reader.go

    			// Thus, setup the regFileReader again after merging PAX headers.
    			if err := tr.handleRegularFile(hdr); err != nil {
    				return nil, err
    			}
    
    			// Sparse formats rely on being able to read from the logical data
    			// section; there must be a preceding call to handleRegularFile.
    			if err := tr.handleSparseFile(hdr, rawHdr); err != nil {
    				return nil, err
    			}
    
    			// Set the final guess at the format.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Mar 08 01:59:14 UTC 2024
    - 26.8K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/deadstore.go

    			}
    		}
    		// walk to previous store
    		if v.Op == OpPhi {
    			// At start of block.  Move on to next block.
    			// The memory phi, if it exists, is always
    			// the first logical store in the block.
    			// (Even if it isn't the first in the current b.Values order.)
    			continue
    		}
    		for _, a := range v.Args {
    			if a.Block == b && a.Type.IsMemory() {
    				v = a
    				goto walkloop
    			}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Apr 25 20:07:26 UTC 2024
    - 11K bytes
    - Viewed (0)
  5. src/internal/coverage/defs.go

    // units are either "simple" or "intraline"; a "simple" coverable unit
    // corresponds to a basic block (region of straight-line code with no
    // jumps or control transfers). An "intraline" unit corresponds to a
    // logical clause nested within some other simple unit. A simple unit
    // will have a zero Parent value; for an intraline unit NxStmts will
    // be zero and Parent will be set to 1 plus the index of the
    // containing simple statement. Example:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Aug 14 12:51:16 UTC 2023
    - 11.9K bytes
    - Viewed (0)
  6. tensorflow/c/eager/c_api_experimental.h

                                                      TF_Buffer* buf,
                                                      TF_Status* status);
    
    // Set logical devices to the context's device manager.
    // If logical devices are already configured at context initialization
    // through TFE_ContextOptions, this method should not be called.
    TF_CAPI_EXPORT extern void TFE_SetLogicalCpuDevices(TFE_Context* ctx,
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Feb 21 22:37:46 UTC 2024
    - 39.5K bytes
    - Viewed (0)
  7. maven-compat/src/main/java/org/apache/maven/artifact/resolver/DefaultArtifactResolver.java

            // have been resolved.
            if (request.isResolveRoot()) {
                // Add the root artifact (as the first artifact to retain logical order of class path!)
                Set<Artifact> allArtifacts = new LinkedHashSet<>();
                allArtifacts.add(rootArtifact);
                allArtifacts.addAll(result.getArtifacts());
    Registered: Wed Jun 12 09:55:16 UTC 2024
    - Last Modified: Thu Apr 25 05:46:50 UTC 2024
    - 24.8K bytes
    - Viewed (0)
  8. src/cmd/asm/internal/asm/testdata/mips64.s

    	MOVV	R1, M1 // 40a10800
    
    //	LMOVW mreg ',' rreg
    //	{
    //		outcode(int($1), &$2, 0, &$4);
    //	}
    	MOVW	M1, R1 // 40010800
    	MOVV	M1, R1 // 40210800
    
    
    //
    // integer operations
    // logical instructions
    // shift instructions
    // unary instructions
    //
    //	LADDW rreg ',' sreg ',' rreg
    //	{
    //		outcode(int($1), &$2, int($4), &$6);
    //	}
    	ADD	R5, R9, R10	// 01255020
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 12.4K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/quantization/stablehlo/quantization_config.proto

      oneof file {
        // Represents representative dataset saved as a .tfrecord file format.
        TfRecordFile tf_record = 1;
      }
    
      // [TF SavedModel] Identifies a SignatureDef which represents a single
      // logical function in a graph.
      optional string signature_key = 2;
    }
    
    // Preset config for static-range post-training quantization (PTQ).
    //
    // Minimal user input about representative datasets is required. Representative
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri May 17 03:36:50 UTC 2024
    - 14.3K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/tensorflow/transforms/replicate_to_island.cc

                       TF::EnqueueTPUEmbeddingRaggedTensorBatchOp,
                       TF::EnqueueTPUEmbeddingArbitraryTensorBatchOp>(op);
    }
    
    // Returns the device ordinal (`device_ordinal`) for a replica (`replica_id`)
    // and logical core (`logical_core`).
    // `replica_id` is the index of the ancestor ReplicateOp in [0, num_replicas).
    // `logical_core` is the index of the TPU core in [0, num_cores_per_replica).
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Jul 24 21:01:40 UTC 2023
    - 16.9K bytes
    - Viewed (0)
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