"VDUP",
	"VEOR",
	"VEOR3",
	"VEXT",
	"VFMLA",
	"VFMLS",
	"VLD1",
	"VLD1R",
	"VLD2",
	"VLD2R",
	"VLD3",
	"VLD3R",
	"VLD4",
	"VLD4R",
	"VMOV",
	"VMOVD",
	"VMOVI",
	"VMOVQ",
	"VMOVS",
	"VORR",
	"VPMULL",
	"VPMULL2",
	"VRAX1",
	"VRBIT",
	"VREV16",
	"VREV32",
	"VREV64",
	"VSHL",
	"VSLI",
	"VSRI",
	"VST1",
	"VST2",
	"VST3",

	  RET

7. Move large constants to vector registers.

Go asm uses VMOVQ/VMOVD/VMOVS to move 128-bit, 64-bit and 32-bit constants into vector registers, respectively.
And for a 128-bit integer, it take two 64-bit operands, for the low and high parts separately.

Examples:

	VMOVS $0x11223344, V0
	VMOVD $0x1122334455667788, V1
	VMOVQ $0x1122334455667788, $0x99aabbccddeeff00, V2   // V2=0x99aabbccddeeff001122334455667788

// The Index field specifies the index number,
// but the size of the fraction is not specified.
// It must be inferred from the instruction and the register type.
// For example, in a VMOV instruction, RegX{D5, 1} represents
// the top 32 bits of the 64-bit D5 register.
type RegX struct {
	Reg   Reg
	Index int
}

func (RegX) IsArg() {}

func (r RegX) String() string {

	"ADDVU",
	"SUBV",
	"SUBVU",
	"DSBH",
	"DSHD",
	"TRUNCFV",
	"TRUNCDV",
	"TRUNCFW",
	"TRUNCDW",
	"MOVWU",
	"MOVFV",
	"MOVDV",
	"MOVVF",
	"MOVVD",
	"VMOVB",
	"VMOVH",
	"VMOVW",
	"VMOVD",
	"LAST",

	"VMLEB",
	"VMLEH",
	"VMLEF",
	"VMLH",
	"VMLHB",
	"VMLHH",
	"VMLHF",
	"VMLO",
	"VMLOB",
	"VMLOH",
	"VMLOF",
	"VML",
	"VMLB",
	"VMLHW",
	"VMLF",
	"VMO",
	"VMOB",
	"VMOH",
	"VMOF",
	"VNO",
	"VNOT",
	"VO",
	"VPK",
	"VPKH",
	"VPKF",
	"VPKG",
	"VPKLS",
	"VPKLSH",
	"VPKLSF",
	"VPKLSG",
	"VPKLSHS",
	"VPKLSFS",
	"VPKLSGS",
	"VPKS",

msa_large_loop:
	VMOVB	W0, (R1)
	VMOVB	W0, 16(R1)
	VMOVB	W0, 32(R1)
	VMOVB	W0, 48(R1)
	VMOVB	W0, 64(R1)
	VMOVB	W0, 80(R1)
	VMOVB	W0, 96(R1)
	VMOVB	W0, 112(R1)

	ADDVU	$128, R1
	SGTU	R6, R1, R3
	BNE	R3, R0, msa_large_loop
	BEQ	R5, R0, done
	VMOVB	W0, -128(R4)
	VMOVB	W0, -112(R4)
	VMOVB	W0, -96(R4)
	VMOVB	W0, -80(R4)
	VMOVB	W0, -64(R4)
	VMOVB	W0, -48(R4)
	VMOVB	W0, -32(R4)
	VMOVB	W0, -16(R4)
	JMP	done

	// ADD	$(off), SP, T0
	// ADD	$(cnt), T0, T1
	// loop:
	// 	MOV	ZERO, (T0)
	// 	ADD	$Widthptr, T0
	//	BNE	T0, T1, loop
	p = pp.Append(p, riscv.AADD, obj.TYPE_CONST, 0, off, obj.TYPE_REG, riscv.REG_T0, 0)
	p.Reg = riscv.REG_SP
	p = pp.Append(p, riscv.AADD, obj.TYPE_CONST, 0, cnt, obj.TYPE_REG, riscv.REG_T1, 0)
	p.Reg = riscv.REG_T0
	p = pp.Append(p, riscv.AMOV, obj.TYPE_REG, riscv.REG_ZERO, 0, obj.TYPE_MEM, riscv.REG_T0, 0)
	loop := p

	MOV	$0x800000, A0                     // stacksize = 8192KB
	MOV	$_rt0_riscv64_freebsd_lib_go(SB), A1
	MOV	A0, 8(X2)
	MOV	A1, 16(X2)
	MOV	$runtime·newosproc0(SB), T0
	JALR	RA, T0

restore:
	// Restore callee-save registers, along with X1 (LR).
	MOV	(8*3)(X2), X1
	MOV	(8*4)(X2), X8
	MOV	(8*5)(X2), X9
	MOV	(8*6)(X2), X18
	MOV	(8*7)(X2), X19
	MOV	(8*8)(X2), X20
	MOV	(8*9)(X2), X21
	MOV	(8*10)(X2), X22
	MOV	(8*11)(X2), X23

	BNEZ	X5, f_align

f_loop_check:
	MOV	$16, X9
	BLT	X12, X9, f_loop8_check
	MOV	$32, X9
	BLT	X12, X9, f_loop16_check
	MOV	$64, X9
	BLT	X12, X9, f_loop32_check
f_loop64:
	MOV	0(X11), X14
	MOV	8(X11), X15
	MOV	16(X11), X16
	MOV	24(X11), X17
	MOV	32(X11), X18
	MOV	40(X11), X19
	MOV	48(X11), X20
	MOV	56(X11), X21
	MOV	X14, 0(X10)
	MOV	X15, 8(X10)
	MOV	X16, 16(X10)
	MOV	X17, 24(X10)
	MOV	X18, 32(X10)

// err | A2          | part of A0
TEXT ·Syscall6<ABIInternal>(SB),NOSPLIT,$0-80
	MOV	A0, A7
	MOV	A1, A0
	MOV	A2, A1
	MOV	A3, A2
	MOV	A4, A3
	MOV	A5, A4
	MOV	A6, A5
	ECALL
	MOV	$-4096, T0
	BLTU	T0, A0, err
	// r1 already in A0
	// r2 already in A1
	MOV	ZERO, A2 // errno
	RET
err:
	SUB	A0, ZERO, A2 // errno
	MOV	$-1, A0	     // r1
	MOV	ZERO, A1     // r2