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Results 1 - 10 of 179 for mipT (0.09 sec)
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test/map.go
} mipT[i].i += 1 if mipT[i].i != int64(i)+1 { panic(fmt.Sprintf("update mipT[%d].i = %d\n", i, mipT[i].i)) } mipT[i].f = float32(i + 1) if mipT[i].f != float32(i+1) { panic(fmt.Sprintf("update mipT[%d].f = %g\n", i, mipT[i].f)) } mipM[i][i]++ if mipM[i][i] != (i+1)+1 { panic(fmt.Sprintf("update mipM[%d][%d] = %d\n", i, i, mipM[i][i])) }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Aug 06 21:02:55 UTC 2014 - 14.9K bytes - Viewed (0) -
src/cmd/asm/internal/arch/mips.go
func IsMIPSMUL(op obj.As) bool { switch op { case mips.AMUL, mips.AMULU, mips.AMULV, mips.AMULVU, mips.ADIV, mips.ADIVU, mips.ADIVV, mips.ADIVVU, mips.AREM, mips.AREMU, mips.AREMV, mips.AREMVU, mips.AMADD, mips.AMSUB: return true } return false } func mipsRegisterNumber(name string, n int16) (int16, bool) { switch name { case "F": if 0 <= n && n <= 31 { return mips.REG_F0 + n, true } case "FCR":
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Mar 04 19:06:44 UTC 2020 - 1.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPS.rules
Junxian Zhu <******@****.***> 1683865731 +0800
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 14:43:03 UTC 2023 - 35.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/mips.s
Junxian Zhu <******@****.***> 1691045041 +0800
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 08 12:17:12 UTC 2023 - 6.7K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/sys/unix/zptrace_mipsnn_linux.go
//go:build linux && (mips || mips64) package unix import "unsafe" // PtraceRegsMips is the registers used by mips binaries. type PtraceRegsMips struct { Regs [32]uint64 Lo uint64 Hi uint64 Epc uint64 Badvaddr uint64 Status uint64 Cause uint64 } // PtraceGetRegsMips fetches the registers used by mips binaries.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:33 UTC 2023 - 1.4K bytes - Viewed (0) -
src/cmd/compile/main.go
"os" ) var archInits = map[string]func(*ssagen.ArchInfo){ "386": x86.Init, "amd64": amd64.Init, "arm": arm.Init, "arm64": arm64.Init, "loong64": loong64.Init, "mips": mips.Init, "mipsle": mips.Init, "mips64": mips64.Init, "mips64le": mips64.Init, "ppc64": ppc64.Init, "ppc64le": ppc64.Init, "riscv64": riscv64.Init, "s390x": s390x.Init, "wasm": wasm.Init, }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 13 18:14:52 UTC 2022 - 1.3K bytes - Viewed (0) -
src/cmd/go/testdata/script/env_cross_build.txt
env GOENV=windows-amd64 go build internal/abi env GOENV=ios-arm64 go build internal/abi env GOENV=linux-mips go build internal/abi -- windows-amd64 -- GOOS=windows GOARCH=amd64 -- ios-arm64 -- GOOS=ios GOARCH=arm64 -- linux-mips -- GOOS=linux
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jun 14 00:03:57 UTC 2023 - 537 bytes - Viewed (0) -
src/internal/goarch/zgoarch_mips.go
// Code generated by gengoarch.go using 'go generate'. DO NOT EDIT. //go:build mips package goarch const GOARCH = `mips` const Is386 = 0 const IsAmd64 = 0 const IsAmd64p32 = 0 const IsArm = 0 const IsArmbe = 0 const IsArm64 = 0 const IsArm64be = 0 const IsLoong64 = 0 const IsMips = 1 const IsMipsle = 0 const IsMips64 = 0 const IsMips64le = 0 const IsMips64p32 = 0 const IsMips64p32le = 0 const IsPpc = 0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 28 18:17:57 UTC 2021 - 576 bytes - Viewed (0) -
src/cmd/compile/internal/mips64/galign.go
package mips64 import ( "cmd/compile/internal/ssa" "cmd/compile/internal/ssagen" "cmd/internal/obj/mips" "internal/buildcfg" ) func Init(arch *ssagen.ArchInfo) { arch.LinkArch = &mips.Linkmips64 if buildcfg.GOARCH == "mips64le" { arch.LinkArch = &mips.Linkmips64le } arch.REGSP = mips.REGSP arch.MAXWIDTH = 1 << 50 arch.SoftFloat = buildcfg.GOMIPS64 == "softfloat" arch.ZeroRange = zerorange
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 03 21:05:55 UTC 2021 - 718 bytes - Viewed (0) -
src/cmd/asm/internal/arch/arch.go
// Note that there is no list of names as there is for x86. for i := mips.REG_R0; i <= mips.REG_R31; i++ { register[obj.Rconv(i)] = int16(i) } for i := mips.REG_F0; i <= mips.REG_F31; i++ { register[obj.Rconv(i)] = int16(i) } for i := mips.REG_M0; i <= mips.REG_M31; i++ { register[obj.Rconv(i)] = int16(i) } for i := mips.REG_FCR0; i <= mips.REG_FCR31; i++ { register[obj.Rconv(i)] = int16(i) }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 21 06:51:28 UTC 2023 - 21.3K bytes - Viewed (0)