pkg debug/elf, const R_PPC64_ADDR16_HIGHESTA = 42
pkg debug/elf, const R_PPC64_ADDR16_HIGHESTA R_PPC64
pkg debug/elf, const R_PPC64_ADDR16_LO = 4
pkg debug/elf, const R_PPC64_ADDR16_LO R_PPC64
pkg debug/elf, const R_PPC64_ADDR16_LO_DS = 57
pkg debug/elf, const R_PPC64_ADDR16_LO_DS R_PPC64
pkg debug/elf, const R_PPC64_ADDR24 = 2
pkg debug/elf, const R_PPC64_ADDR24 R_PPC64
pkg debug/elf, const R_PPC64_ADDR32 = 1

		register[obj.Rconv(i)] = int16(i)
	}
	for i := mips.REG_FCR0; i <= mips.REG_FCR31; i++ {
		register[obj.Rconv(i)] = int16(i)
	}
	register["HI"] = mips.REG_HI
	register["LO"] = mips.REG_LO
	// Pseudo-registers.
	register["SB"] = RSB
	register["FP"] = RFP
	register["PC"] = RPC
	// Avoid unintentionally clobbering g using R30.
	delete(register, "R30")
	register["g"] = mips.REG_R30

//	}
	MOVV	R25, R17	// 00198825
	MOVV	R1, R2		// 00011025
	MOVV	LO, R1		// 00000812
	MOVV	HI, R1		// 00000810
	MOVV	R1, LO		// 00200013
	MOVV	R1, HI		// 00200011


//	LMOVW rreg ',' rreg
//	{
//		outcode(int($1), &$2, 0, &$4);
//	}
	MOVW	R1, R2		// 00011004
	MOVW	LO, R1		// 00000812
	MOVW	HI, R1		// 00000810
	MOVW	R1, LO		// 00200013
	MOVW	R1, HI		// 00200011
	MOVWU	R14, R27	// 000ed83c001bd83e

	"WP": arm.C_WBIT | arm.C_PBIT,
}

var armSCOND = map[string]uint8{
	"EQ":  arm.C_SCOND_EQ,
	"NE":  arm.C_SCOND_NE,
	"CS":  arm.C_SCOND_HS,
	"HS":  arm.C_SCOND_HS,
	"CC":  arm.C_SCOND_LO,
	"LO":  arm.C_SCOND_LO,
	"MI":  arm.C_SCOND_MI,
	"PL":  arm.C_SCOND_PL,
	"VS":  arm.C_SCOND_VS,
	"VC":  arm.C_SCOND_VC,
	"HI":  arm.C_SCOND_HI,
	"LS":  arm.C_SCOND_LS,
	"GE":  arm.C_SCOND_GE,
	"LT":  arm.C_SCOND_LT,

			// Parse the upper and lower bounds.
			lo := p.registerNumber(tok.String())
			hi := lo
			if p.peek() == '-' {
				p.next()
				hi = p.registerNumber(p.next().String())
			}
			if hi < lo {
				lo, hi = hi, lo
			}
			// Check there are no duplicates in the register list.
			for i := 0; lo <= hi && i < maxReg; i++ {
				if bits&(1<<lo) != 0 {
					p.errorf("register R%d already in list", lo)

	{"R26", "R26"},
	{"R27", "R27"},
	{"R29", "R29"},
	{"R3", "R3"},
	{"R31", "R31"},
	{"R4", "R4"},
	{"R5", "R5"},
	{"R6", "R6"},
	{"R7", "R7"},
	{"R8", "R8"},
	{"R9", "R9"},
	{"LO", "LO"},
	{"a(FP)", "a(FP)"},
	{"g", "g"},
	{"RSB", "R28"},
	{"ret+8(FP)", "ret+8(FP)"},
	{"runtime·abort(SB)", "runtime.abort(SB)"},
	{"·AddUint32(SB)", "pkg.AddUint32(SB)"},
	{"·trunc(SB)", "pkg.trunc(SB)"},

and offsets match.
On 32-bit systems, the low and high 32 bits of a 64-bit value are distinguished by adding
a <code>_lo</code> or <code>_hi</code> suffix to the name, as in <code>arg_lo+0(FP)</code> or <code>arg_hi+4(FP)</code>.
If a Go prototype does not name its result, the expected assembly name is <code>ret</code>.
</p>

<p>

	CSINCW HS, ZR, R27, R14                    // ee279b1a
	CSINC VC, R2, R1, R1                       // 4174819a
	CSINVW EQ, R2, R21, R17                    // 5100955a
	CSINV LO, R2, R19, R23                     // 573093da
	CINCW LO, R27, R14                         // 6e279b1a
	CINCW HS, R27, ZR                          // 7f379b1a
	CINVW EQ, R2, R17                          // 5110825a

	//inst:
	//
	// load ints and bytes
	//
	//	LMOVW rreg ',' rreg
	//	{
	//		outcode(int($1), &$2, 0, &$4);
	//	}
	MOVW	R1, R2
	MOVW	LO, R1
	MOVW	HI, R1
	MOVW	R1, LO
	MOVW	R1, HI
	MOVW	R1, R2
	MOVW	LO, R1
	MOVW	HI, R1
	MOVW	R1, LO
	MOVW	R1, HI

	//	LMOVW addr ',' rreg
	//	{
	//		outcode(int($1), &$2, 0, &$4);
	//	}
	MOVW	foo<>+3(SB), R2
	MOVW	16(R1), R2
	MOVW	(R1), R2

pkg debug/elf, const R_PPC64_PLTGOT16_HI = 54
pkg debug/elf, const R_PPC64_PLTGOT16_HI R_PPC64
pkg debug/elf, const R_PPC64_PLTGOT16_LO = 53
pkg debug/elf, const R_PPC64_PLTGOT16_LO R_PPC64
pkg debug/elf, const R_PPC64_PLTGOT_LO_DS = 66
pkg debug/elf, const R_PPC64_PLTGOT_LO_DS R_PPC64
pkg debug/elf, const R_PPC64_REL16DX_HA = 246
pkg debug/elf, const R_PPC64_REL16DX_HA R_PPC64
pkg debug/elf, const R_PPC64_REL24_NOTOC = 116