Search Options

Results per page
Sort
Preferred Languages
Advance

Results 1 - 10 of 93 for fsub (0.08 sec)

  1. src/math/modf_ppc64x.s

    //go:build ppc64 || ppc64le
    
    #include "textflag.h"
    
    // func archModf(f float64) (int float64, frac float64)
    TEXT ·archModf(SB),NOSPLIT,$0
    	FMOVD	f+0(FP), F0
    	FRIZ	F0, F1
    	FMOVD	F1, int+8(FP)
    	FSUB	F1, F0, F2
    	FCPSGN	F2, F0, F2
    	FMOVD	F2, frac+16(FP)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 416 bytes
    - Viewed (0)
  2. src/cmd/vendor/golang.org/x/arch/x86/x86asm/gnu.go

    			switch inst.Op {
    			case FDIV:
    				inst.Op = FDIVR
    			case FDIVR:
    				inst.Op = FDIV
    			case FSUB:
    				inst.Op = FSUBR
    			case FSUBR:
    				inst.Op = FSUB
    			case FDIVP:
    				inst.Op = FDIVRP
    			case FDIVRP:
    				inst.Op = FDIVP
    			case FSUBP:
    				inst.Op = FSUBRP
    			case FSUBRP:
    				inst.Op = FSUBP
    			}
    		}
    
    	case MOVNTSD:
    		// MOVNTSD is F2 0F 2B /r.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:33 UTC 2023
    - 21.4K bytes
    - Viewed (0)
  3. src/math/log1p_s390x.s

    	WFCHDBS	V4, V2, V2
    	BEQ	LEXITTAGlog1p
    	MOVD	$·log1pxnan<>+0(SB), R1
    	FMOVD	0(R1), F0
    	FMOVD	F0, ret+8(FP)
    	RET
    
    L8:
    	LDGR	R2, F2
    	FSUB	F4, F3
    	FMADD	F2, F4, F1
    	MOVD	$·log1pc4<>+0(SB), R2
    	WORD	$0xB3130041	// lcdbr %f4,%f1
    	FMOVD	0(R2), F7
    	FSUB	F3, F0
    	MOVD	$·log1pc3<>+0(SB), R2
    	FMOVD	0(R2), F3
    	MOVD	$·log1pc2<>+0(SB), R2
    	WFMDB	V1, V1, V6
    	FMADD	F7, F4, F3
    	WFMSDB	V0, V2, V1, V0
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 16 15:34:41 UTC 2019
    - 5.1K bytes
    - Viewed (0)
  4. src/math/erfc_s390x.s

    	FMOVD	F2, ret+8(FP)
    	RET
    
    L2:
    	LTDBR	F0, F0
    	MOVH	$0x0, R4
    	BLTU	L3
    	FMOVD	F0, F1
    L9:
    	MOVH	$0x400F, R3
    	MOVW	R1, R6
    	MOVW	R3, R7
    	CMPBGT	R6, R7, L10
    	FMOVD	784(R9), F3
    	FSUB	F1, F3
    	VLEG	$0, 776(R9), V20
    	WFDDB	V1, V3, V6
    	VLEG	$0, 768(R9), V18
    	FMOVD	760(R9), F7
    	FMOVD	752(R9), F5
    	VLEG	$0, 744(R9), V16
    	FMOVD	736(R9), F3
    	FMOVD	728(R9), F2
    	FMOVD	720(R9), F4
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 16 15:34:41 UTC 2019
    - 14.4K bytes
    - Viewed (0)
  5. src/cmd/internal/obj/ppc64/anames.go

    	"FMOVSU",
    	"FMOVSX",
    	"FMOVSZ",
    	"FMSUB",
    	"FMSUBCC",
    	"FMSUBS",
    	"FMSUBSCC",
    	"FMUL",
    	"FMULCC",
    	"FMULS",
    	"FMULSCC",
    	"FNABS",
    	"FNABSCC",
    	"FNEG",
    	"FNEGCC",
    	"FNMADD",
    	"FNMADDCC",
    	"FNMADDS",
    	"FNMADDSCC",
    	"FNMSUB",
    	"FNMSUBCC",
    	"FNMSUBS",
    	"FNMSUBSCC",
    	"FRSP",
    	"FRSPCC",
    	"FSUB",
    	"FSUBCC",
    	"FSUBS",
    	"FSUBSCC",
    	"ISEL",
    	"MOVMW",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 01 18:50:29 UTC 2024
    - 6.7K bytes
    - Viewed (0)
  6. src/cmd/internal/obj/s390x/anames.go

    	"FADD",
    	"FADDS",
    	"FCMPO",
    	"FCMPU",
    	"CEBR",
    	"FDIV",
    	"FDIVS",
    	"FMADD",
    	"FMADDS",
    	"FMOVD",
    	"FMOVS",
    	"FMSUB",
    	"FMSUBS",
    	"FMUL",
    	"FMULS",
    	"FNABS",
    	"FNEG",
    	"FNEGS",
    	"LEDBR",
    	"LDEBR",
    	"LPDFR",
    	"LNDFR",
    	"FSUB",
    	"FSUBS",
    	"FSQRT",
    	"FSQRTS",
    	"FIEBR",
    	"FIDBR",
    	"CPSDR",
    	"LTEBR",
    	"LTDBR",
    	"TCEB",
    	"TCDB",
    	"LDGR",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Sep 05 16:41:03 UTC 2023
    - 7.1K bytes
    - Viewed (0)
  7. src/math/expm1_s390x.s

    	WORD	$0xB3130022	//lcdbr	%f2,%f2
    	MOVD	$·expm1tab<>+0(SB), R2
    	WORD	$0x68432000	//ld	%f4,0(%r3,%r2)
    	FMADD	F4, F0, F0
    	SLD	$48, R1, R2
    	WFMSDB	V2, V0, V4, V0
    	LDGR	R2, F4
    	WORD	$0xB3130000	//lcdbr	%f0,%f0
    	FSUB	F4, F6
    	WFMSDB	V0, V4, V6, V0
    	FMOVD	F0, ret+8(FP)
    	RET
    L16:
    	WFCEDBS	V2, V2, V4
    	BVS	LEXITTAGexpm1
    	WORD	$0xED205008	//cdb	%f2,.L34-.L22(%r5)
    	BYTE	$0x00
    	BYTE	$0x19
    	BLT	L6
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 16 15:34:41 UTC 2019
    - 5.3K bytes
    - Viewed (0)
  8. src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/plan9.go

    	case DIVD, DIVDCC, DIVDU, DIVDUCC, DIVDE, DIVDECC, DIVDEU, DIVDEUCC, DIVDO, DIVDOCC, DIVDUO, DIVDUOCC:
    		return true
    	case MODUD, MODSD, MODUW, MODSW:
    		return true
    	case FADD, FADDS, FSUB, FSUBS, FMUL, FMULS, FDIV, FDIVS, FMADD, FMADDS, FMSUB, FMSUBS, FNMADD, FNMADDS, FNMSUB, FNMSUBS, FMULSCC:
    		return true
    	case FADDCC, FADDSCC, FSUBCC, FMULCC, FDIVCC, FDIVSCC:
    		return true
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 22 17:16:14 UTC 2022
    - 10.9K bytes
    - Viewed (0)
  9. src/math/sinh_s390x.s

    	FMOVD   0(R1), F5
    	MOVD    $sinhe2<>+0(SB), R1
    	VLEG    $0, 0(R1), V16
    	MOVD    $sinhe1<>+0(SB), R1
    	WFMADB  V2, V5, V16, V5
    	VLEG    $0, 0(R1), V16
    	WFMADB  V3, V7, V5, V3
    	WFMADB  V2, V1, V16, V1
    	FSUB    F6, F0
    	FMUL    F1, F4
    	MOVD    $sinhe0<>+0(SB), R1
    	FMOVD   0(R1), F6
    	WFMADB  V2, V3, V6, V2
    	WFMADB  V0, V2, V4, V0
    	FMOVD   F0, ret+8(FP)
    	RET
    
    L9:
    	WFMADB  V0, V1, V6, V0
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 17 13:54:10 UTC 2021
    - 6K bytes
    - Viewed (0)
  10. src/cmd/compile/internal/ssa/_gen/RISCV64.rules

    (F(MADD|NMADD|MSUB|NMSUB)S neg:(FNEGS x) y z) && neg.Uses == 1 => (F(NMSUB|MSUB|NMADD|MADD)S x y z)
    (F(MADD|NMADD|MSUB|NMSUB)S x y neg:(FNEGS z)) && neg.Uses == 1 => (F(MSUB|NMSUB|MADD|NMADD)S x y z)
    (F(MADD|NMADD|MSUB|NMSUB)D neg:(FNEGD x) y z) && neg.Uses == 1 => (F(NMSUB|MSUB|NMADD|MADD)D x y z)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 07 14:57:07 UTC 2024
    - 40.3K bytes
    - Viewed (0)
Back to top