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Results 1 - 6 of 6 for SHRBconst (0.24 sec)
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src/cmd/compile/internal/ssa/_gen/386Ops.go
{name: "SHRWconst", argLength: 1, reg: gp11, asm: "SHRW", aux: "Int16", resultInArg0: true, clobberFlags: true}, // unsigned arg0 >> auxint, shift amount 0-15 {name: "SHRBconst", argLength: 1, reg: gp11, asm: "SHRB", aux: "Int8", resultInArg0: true, clobberFlags: true}, // unsigned arg0 >> auxint, shift amount 0-7
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 14 08:10:32 UTC 2023 - 45.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewrite386.go
return true } return false } func rewriteValue386_Op386SHRB(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] // match: (SHRB x (MOVLconst [c])) // cond: c&31 < 8 // result: (SHRBconst [int8(c&31)] x) for { x := v_0 if v_1.Op != Op386MOVLconst { break } c := auxIntToInt32(v_1.AuxInt) if !(c&31 < 8) { break } v.reset(Op386SHRBconst)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 21:05:46 UTC 2023 - 262.4K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
{name: "SHRWconst", argLength: 1, reg: gp11, asm: "SHRW", aux: "Int8", resultInArg0: true, clobberFlags: true}, {name: "SHRBconst", argLength: 1, reg: gp11, asm: "SHRB", aux: "Int8", resultInArg0: true, clobberFlags: true}, {name: "SARQ", argLength: 2, reg: gp21shift, asm: "SARQ", resultInArg0: true, clobberFlags: true},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 04 16:40:24 UTC 2023 - 98K bytes - Viewed (1) -
src/cmd/compile/internal/ssa/_gen/AMD64.rules
(SHRW x (MOV(Q|L)const [c])) && c&31 < 16 => (SHRWconst [int8(c&31)] x) (SHRW _ (MOV(Q|L)const [c])) && c&31 >= 16 => (MOVLconst [0]) (SHRB x (MOV(Q|L)const [c])) && c&31 < 8 => (SHRBconst [int8(c&31)] x) (SHRB _ (MOV(Q|L)const [c])) && c&31 >= 8 => (MOVLconst [0]) (SARQ x (MOV(Q|L)const [c])) => (SARQconst [int8(c&63)] x) (SARL x (MOV(Q|L)const [c])) => (SARLconst [int8(c&31)] x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 93.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteAMD64.go
} return false } func rewriteValueAMD64_OpAMD64SHRB(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] // match: (SHRB x (MOVQconst [c])) // cond: c&31 < 8 // result: (SHRBconst [int8(c&31)] x) for { x := v_0 if v_1.Op != OpAMD64MOVQconst { break } c := auxIntToInt64(v_1.AuxInt) if !(c&31 < 8) { break } v.reset(OpAMD64SHRBconst)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 712.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
reg: regInfo{ inputs: []inputInfo{ {0, 239}, // AX CX DX BX BP SI DI }, outputs: []outputInfo{ {0, 239}, // AX CX DX BX BP SI DI }, }, }, { name: "SHRBconst", auxType: auxInt8, argLen: 1, resultInArg0: true, clobberFlags: true, asm: x86.ASHRB, reg: regInfo{ inputs: []inputInfo{ {0, 239}, // AX CX DX BX BP SI DI
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)