MOVD	$0x2001(R7), R1               // MOVD	$8193(R7), R1               // e108409121040091
	MOVD	$0xffffff(R7), R1             // MOVD	$16777215(R7), R1           // e1fc7f9121fc3f91
	MOVD	$-0x1(R7), R1                 // MOVD	$-1(R7), R1                 // e10400d1
	MOVD	$-0x30(R7), R1                // MOVD	$-48(R7), R1                // e1c000d1

	XORW	(R1), R2              // 57201000
	XORW	-1(R1), R2            // e3201fffff57

	// shift and rotate instructions
	SRD	$4, R4, R7              // eb740004000c
	SRD	R1, R4, R7              // eb741000000c
	SRW	$4, R4, R7              // eb74000400de
	SRW	R1, R4, R7              // eb74100000de
	SLW	$4, R3, R6              // eb63000400df
	SLW	R2, R3, R6              // eb63200000df

	ADDS	R7@>2, R5, R16                                   // ERROR "unsupported shift operator"
	ADDSW	R7@>2, R5, R16                                   // ERROR "unsupported shift operator"
	SUB	R7@>2, R5, R16                                   // ERROR "unsupported shift operator"
	SUBW	R7@>2, R5, R16                                   // ERROR "unsupported shift operator"

	TST	$4278190080, R9      // ff0419e3
	TST	R9<<30, R7           // 090f17e1
	TST	R9>>30, R7           // 290f17e1
	TST	R9->30, R7           // 490f17e1
	TST	R9@>30, R7           // 690f17e1
	TST	R9<<R8, R7           // 190817e1
	TST	R9>>R8, R7           // 390817e1
	TST	R9->R8, R7           // 590817e1
	TST	R9@>R8, R7           // 790817e1

// CMP
	CMP	$255, R7             // ff0057e3

	OR $65535, R5, R6               // 60a6ffff
	OR $65536, R6                   // 64c60001
	OR $65536, R6, R7               // 64c70001
	OR $-32767, R5                  // 3be080017fe52b78
	OR $-32767, R5, R6              // 3be080017fe62b78
	OR $-32768, R6                  // 3be080007fe63378
	OR $-32768, R6, R7              // 3be080007fe73378
	OR $1234567, R5                 // 64a5001260a5d687

The range of registers is specified by a start register and an end register.
For example, <code>LMG</code> <code>(R9),</code> <code>R5,</code> <code>R7</code> would load
<code>R5</code>, <code>R6</code> and <code>R7</code> with the 64-bit values at
<code>0(R9)</code>, <code>8(R9)</code> and <code>16(R9)</code> respectively.
</p>

<p>

		}
		// fmt.Printf("SYM %s\n", obj.Dconv(&emptyProg, 0, a))
		if p.peek() == scanner.EOF {
			return
		}
	}

	// Special register list syntax for arm: [R1,R3-R7]
	if tok.ScanToken == '[' {
		if prefix != 0 {
			p.errorf("illegal use of register list")
		}
		p.registerList(a)
		p.expectOperandEnd()
		return
	}

	// Register: R1