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src/cmd/asm/internal/asm/pseudo_test.go
} return res } func TestErroneous(t *testing.T) { type errtest struct { pseudo string operands string expected string } nonRuntimeTests := []errtest{ {"TEXT", "", "expect two or three operands for TEXT"}, {"TEXT", "%", "expect two or three operands for TEXT"}, {"TEXT", "1, 1", "TEXT symbol \"<erroneous symbol>\" must be a symbol(SB)"},
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Tue Aug 29 07:48:38 GMT 2023 - 3.1K bytes - Click Count (0) -
src/cmd/asm/internal/asm/asm.go
// GLOBL shifts<>(SB),$256 func (p *Parser) asmGlobl(operands [][]lex.Token) { if len(operands) != 2 && len(operands) != 3 { p.errorf("expect two or three operands for GLOBL") return } // Operand 0 has the general form foo<>+0x04(SB). nameAddr := p.address(operands[0]) if !p.validSymbol("GLOBL", &nameAddr, false) { return } next := 1 // Next operand is the optional flag, a literal integer.
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Tue Oct 21 15:13:08 GMT 2025 - 26.7K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/riscv64error.s
VMERGEVIM $15, V2, V4, V3 // ERROR "invalid vector mask register" VMVVV V1, V2, V3 // ERROR "too many operands for instruction" VMVVX X10, V2, V3 // ERROR "too many operands for instruction" VMVVI $15, V2, V3 // ERROR "too many operands for instruction" VSADDUVV V1, V2, V4, V3 // ERROR "invalid vector mask register" VSADDUVX X10, V2, V4, V3 // ERROR "invalid vector mask register"
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Wed Sep 24 13:21:53 GMT 2025 - 26.8K bytes - Click Count (0) -
doc/go_spec.html
</pre> <h2 id="Expressions">Expressions</h2> <p> An expression specifies the computation of a value by applying operators and functions to operands. </p> <h3 id="Operands">Operands</h3> <p> Operands denote the elementary values in an expression. An operand may be a literal, a (possibly <a href="#Qualified_identifiers">qualified</a>) non-<a href="#Blank_identifier">blank</a> identifier denoting a
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Tue Dec 02 23:07:19 GMT 2025 - 286.5K bytes - Click Count (1) -
src/cmd/asm/internal/asm/testdata/arm64error.s
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Tue Oct 14 19:00:00 GMT 2025 - 38.4K bytes - Click Count (0) -
src/cmd/asm/internal/arch/arch.go
// Pseudo-registers. register["SB"] = RSB register["FP"] = RFP register["PC"] = RPC register["SP"] = RSP registerPrefix := map[string]bool{ "F": true, "R": true, } // special operands for DMB/DSB instructions register["MB_SY"] = arm.REG_MB_SY register["MB_ST"] = arm.REG_MB_ST register["MB_ISH"] = arm.REG_MB_ISH register["MB_ISHST"] = arm.REG_MB_ISHST register["MB_NSH"] = arm.REG_MB_NSH
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Thu Nov 13 12:17:37 GMT 2025 - 21.7K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/amd64enc_extra.s
VMOVQ (AX), X20 // 62e1fd086e20 or 62e1fe087e20 VMOVQ 7(DX), X20 // 62e1fd086ea207000000 or 62e1fe087ea207000000 VMOVQ -15(R11)(CX*1), X20 // 62c1fd086ea40bf1ffffff or 62c1fe087ea40bf1ffffff VMOVQ (SP)(AX*2), X20 // 62e1fd086e2444 or 62e1fe087e2444 // "VMOVQ xmm1, r/m64"/7E vs "VMOVQ xmm1, xmm2/m64"/D6 with mem operand.
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Thu Feb 20 11:20:03 GMT 2025 - 57.7K bytes - Click Count (0) -
internal/s3select/sql/statement.go
selectAST.Expression.Expressions[0].Expression.And[0].Condition[0].Operand != nil && selectAST.Expression.Expressions[0].Expression.And[0].Condition[0].Operand.Operand.Left != nil && selectAST.Expression.Expressions[0].Expression.And[0].Condition[0].Operand.Operand.Left.Left != nil && selectAST.Expression.Expressions[0].Expression.And[0].Condition[0].Operand.Operand.Left.Left.Primary != nil &&
Created: Sun Dec 28 19:28:13 GMT 2025 - Last Modified: Sun Sep 28 20:59:21 GMT 2025 - 9K bytes - Click Count (0) -
internal/s3select/sql/parser.go
} // Condition represents a negation or a condition operand type Condition struct { Operand *ConditionOperand `parser:" @@"` Not *Condition `parser:"| \"NOT\" @@"` } // ConditionOperand is a operand followed by an optional operation expression. type ConditionOperand struct { Operand *Operand `parser:"@@"` ConditionRHS *ConditionRHS `parser:"@@?"` }Created: Sun Dec 28 19:28:13 GMT 2025 - Last Modified: Thu Jan 18 07:03:17 GMT 2024 - 12.9K bytes - Click Count (0) -
internal/s3select/sql/analysis.go
if e.ConditionRHS == nil { result = e.Operand.analyze(s) } else { result.combine(e.Operand.analyze(s)) result.combine(e.ConditionRHS.analyze(s)) } return result } func (e *ConditionRHS) analyze(s *Select) (result qProp) { switch { case e.Compare != nil: result = e.Compare.Operand.analyze(s) case e.Between != nil: result.combine(e.Between.Start.analyze(s))Created: Sun Dec 28 19:28:13 GMT 2025 - Last Modified: Sun Sep 28 20:59:21 GMT 2025 - 8.6K bytes - Click Count (0)