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  1. .github/ISSUE_TEMPLATE/11-language-change.yml

      - type: textarea
        id: related-proposals
        attributes:
          label: Has this idea, or one like it, been proposed before?
          description: If so, how does this proposal differ?
          placeholder: |
           Yes or No
    
           If yes, 
            1. Mention the related proposals 
            2. then describe how this proposal differs       
        validations:
          required: true
    
      - type: textarea
        id: error-handling-proposal
    Others
    - Registered: Tue May 07 11:14:38 GMT 2024
    - Last Modified: Wed Nov 22 20:49:24 GMT 2023
    - 4.7K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/amd64.s

    	SHLL	CX, R12
    	SHLL	CX, foo+4(SB)
    	// Old syntax, still accepted:
    	SHLL	CX, R11:AX // SHLL CX, AX, R11
    
    // LTYPEM spec6	{ outcode($1, &$2); }
    	MOVL	AX, R11
    	MOVL	$4, R11
    //	MOVL	AX, 0(AX):DS // no longer works - did it ever?
    
    // LTYPEI spec7	{ outcode($1, &$2); }
    	IMULB	DX
    	IMULW	DX, BX
    	IMULL	R11, R12
    	IMULQ	foo+4(SB), R11
    
    // LTYPEXC spec8	{ outcode($1, &$2); }
    	CMPPD	X1, X2, 4
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Tue Apr 09 18:57:21 GMT 2019
    - 3.3K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/amd64error.s

    	VPGATHERQQ X2, (BP)(Y7*2), X1   // ERROR "invalid instruction"
    	// VM/Y rejects X index register.
    	VPGATHERQQ Y2, (BP)(X7*2), Y1   // ERROR "invalid instruction"
    	VPGATHERDD Y5, -8(X14*8), Y6    // ERROR "invalid instruction"
    	// No VSIB for legacy instructions.
    	MOVL (AX)(X0*1), AX             // ERROR "invalid instruction"
    	MOVL (AX)(Y0*1), AX             // ERROR "invalid instruction"
    	// VSIB/VM is invalid without vector index.
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Wed Jun 14 00:03:57 GMT 2023
    - 8.9K bytes
    - Viewed (0)
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