FMOVDU (R3), F1                 // cc230000
	FMOVS 4(R3), F1                 // c0230004
	FMOVS (R3)(R4), F1              // 7c241c2e
	FMOVS (R3)(R0), F1              // 7c201c2e
	FMOVS (R3), F1                  // c0230000
	FMOVSU 4(R3), F1                // c4230004
	FMOVSU (R3)(R4), F1             // 7c241c6e
	FMOVSU (R3)(R0), F1             // 7c201c6e
	FMOVSU (R3), F1                 // c4230000

        IncludesArtifactFilter f1 = new IncludesArtifactFilter(patterns);

        IncludesArtifactFilter f2 = new IncludesArtifactFilter(patterns);

        assertTrue(f1.equals(f2));
        assertTrue(f2.equals(f1));
        assertTrue(f1.hashCode() == f2.hashCode());

        IncludesArtifactFilter f3 = new IncludesArtifactFilter(Arrays.asList("d", "c", "e"));
        assertTrue(f1.equals(f3));

     */
    @Test
    void testBuildFromMiddlePom() throws Exception {
        File f1 = getTestFile("src/test/resources/projects/grandchild-check/child/pom.xml");
        File f2 = getTestFile("src/test/resources/projects/grandchild-check/child/grandchild/pom.xml");

        getProject(f1);

        // it's the building of the grandchild project, having already cached the child project

	FCVTDLU X5, F0					// 538032d2
	FCVTSD	F0, F1					// d3001040
	FCVTDS	F0, F1					// d3000042
	FSGNJD	F1, F0, F2				// 53011022
	FSGNJND	F1, F0, F2				// 53111022
	FSGNJXD	F1, F0, F2				// 53211022
	FMVXD	F0, X5					// d30200e2
	FMVDX	X5, F0					// 538002f2
	FMADDD	F1, F2, F3, F4				// 4382201a
	FMSUBD	F1, F2, F3, F4				// 4782201a
	FNMSUBD	F1, F2, F3, F4				// 4b82201a
	FNMADDD	F1, F2, F3, F4				// 4f82201a

	//		outcode(int($1), &$2, 0, &$4);
	//	}
	ABSD	F1, F2

	//	LFADD freg ',' freg
	//	{
	//		outcode(int($1), &$2, 0, &$4);
	//	}
	ADDD	F1, F2

	//	LFADD freg ',' freg ',' freg
	//	{
	//		outcode(int($1), &$2, int($4.Reg), &$6);
	//	}
	ADDD	F1, F2, F3

	//	LFCMP freg ',' freg
	//	{
	//		outcode(int($1), &$2, 0, &$4);
	//	}
	CMPEQD	F1, F2


	//
	// WORD
	//
	WORD	$1

		t.Fatalf("Failed to unmarshal %s", string(b))
	}
	if f1.ObjectSizeLessThan != f2.ObjectSizeLessThan {
		t.Fatalf("Expected %v but got %v", f1.ObjectSizeLessThan, f2.And.ObjectSizeLessThan)
	}
	if f1.ObjectSizeGreaterThan != f2.ObjectSizeGreaterThan {
		t.Fatalf("Expected %v but got %v", f1.ObjectSizeGreaterThan, f2.And.ObjectSizeGreaterThan)
	}

	f1 = Filter{
		set: true,
		And: And{

	FLDPD	11(RSP), (F1, F2)   // fb2f0091610b406d
	FLDPD	1024(RSP), (F1, F2) // fb031091610b406d
	FLDPD.W	8(RSP), (F1, F2)    // e18bc06d
	FLDPD.P	8(RSP), (F1, F2)    // e18bc06c
	FLDPD	-31(R0), (F1, F2)   // 1b7c00d1610b406d
	FLDPD	-4(R0), (F1, F2)    // 1b1000d1610b406d
	FLDPD	-8(R0), (F1, F2)    // 01887f6d
	FLDPD	x(SB), (F1, F2)
	FLDPD	x+8(SB), (F1, F2)
	FLDPS	-5(R0), (F1, F2)    // 1b1400d1610b402d

	SD	X5, 4294967296(X6)		// ERROR "constant 4294967296 too large"
	SRLI	$1, X5, F1			// ERROR "expected integer register in rd position but got non-integer register F1"
	SRLI	$1, F1, X5			// ERROR "expected integer register in rs1 position but got non-integer register F1"
	FNES	F1, (X5)			// ERROR "needs an integer register output"

	FIEBR	$0, F0, F1             // b3570010
	FIDBR	$7, F2, F3             // b35f7032
	FMADD	F1, F1, F1             // b31e1011
	FMADDS	F1, F2, F3             // b30e3012
	FMSUB	F4, F5, F5             // b31f5045
	FMSUBS	F6, F6, F7             // b30f7066
	LPDFR	F1, F2                 // b3700021
	LNDFR	F3, F4                 // b3710043
	CPSDR	F5, F6, F7             // b3725076
	LTEBR	F1, F2                 // b3020021

				{Field: &schema.Field{Name: "FieldE1"}},
				{Field: &schema.Field{Name: "FieldE2"}},
			},
		},
		"idx_index_tests_field_f1": {
			Name:   "idx_index_tests_field_f1",
			Fields: []schema.IndexOption{{Field: &schema.Field{Name: "FieldF1"}}},
		},
		"uniq_field_f1_f2": {
			Name:  "uniq_field_f1_f2",
			Class: "UNIQUE",
			Fields: []schema.IndexOption{
				{Field: &schema.Field{Name: "FieldF1"}},